LTC3850_15 Datasheet, PDF (16/38 Pages) Linear Technology – Dual, 2-Phase Synchronous Step-Down Switching Controller

LTC3850/LTC3850-1
APPLICATIONS INFORMATION
Ensure that R1 has a power rating higher than this value.
If high efficiency is necessary at light loads, consider this
power loss when deciding whether to use DCR sensing or
sense resistors. Light load power loss can be modestly
higher with a DCR network than with a sense resistor,
due to the extra switching losses incurred through R1.
However, DCR sensing eliminates a sense resistor, re-
duces conduction losses and provides higher efficiency
at heavy loads. Peak efficiency is about the same with
either method.
To maintain a good signal to noise ratio for the current
sense signal, use a minimum ∆V_SENSE of 10mV to 15mV.
For a DCR sensing application, the actual ripple voltage
will be determined by the equation:
∆V_SENSE
=
V_IN − V_OUT
R1• C1
V_OUT
V_IN • f_OSC
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant-
frequency architectures by preventing subharmonic
oscillations at high duty cycles. It is accomplished inter-
nally by adding a compensating ramp to the inductor
current signal at duty cycles in excess of 40%. Normally,
this results in a reduction of maximum inductor peak cur-
rent for duty cycles > 40%. However, the LTC3850 uses
a patented scheme that counteracts this compensating
ramp, which allows the maximum inductor peak current
to remain unaffected throughout all duty cycles.
Inductor Value Calculation
Given the desired input and output voltages, the inductor
value and operating frequency f_OSC directly determine the
inductor’s peak-to-peak ripple current:
I_RIPPLE
=
V_OUT
V_IN


V_IN – V_OUT
f_OSC • L


Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors, and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
16
A reasonable starting point is to choose a ripple current
that is about 40% of I_OUT(MAX). Note that the largest ripple
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
L ≥ ^{VIN – VOUT} • ^VOUT
f_OSC • I_RIPPLE V_IN
Inductor Core Selection
Once the inductance value is determined, the type of in-
ductor must be selected. Core loss is independent of core
size for a fixed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode
(Optional) Selection
Two external power MOSFETs must be selected for each
controller in the LTC3850: one N-channel MOSFET for the
top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV_CC
voltage. This voltage is typically 5V during start-up
(see EXTV_CC Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected (V_IN
< 5V); then, sub-logic level threshold MOSFETs (V_GS(TH)
< 3V) should be used. Pay close attention to the BV_DSS
specification for the MOSFETs as well; most of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the
on-resistance R_DS(ON), Miller capacitance C_MILLER, input
38501fc