LTC3603 Datasheet, PDF (16/22 Pages) Linear Technology – 2.5A, 15V Monolithic Synchronous Step-Down Regulator

LTC3603
APPLICATIONS INFORMATION
R_PG
200k
PGOOD
R_OSC
105k
C_ITH
1nF
R_ITH
4.32k
R1
105k
R2
475k
C_FB
10pF
SYNC/MODE
PGOOD
RT
INTV_CC
PV_IN
PV_IN
BOOST
ITH
LTC3603
V_FB
RUN
TRACK/SS
PGND
SW
SW
SW
PGND
PGND
C_VCC
1μF
V_IN
12V
C_IN
22μF
D1
C_BST
0.22μF
L1
2.2μH
V_OUT
3.3V
2.5A
C_OUT
100μF
L1: VISHAY IHLP2525CZER2R2MO1
C_IN: TAIYO YUDEN TMK325BJ226MM-T
C_OUT: TDK C3225X5ROJ107M
3603 F06
Figure 6. 12V to 3.3V, 2.5A Regulator at 1MHz, Burst Mode Operation
Choose a standard value of R2 = 475k. The voltage on
the MODE pin will be set to 0.6V by tying the MODE pin
to the FB pin. This will set the burst current equal to ap-
proximately 1A. Figure 6 shows a complete schematic for
this design example.
How to Reduce SW Ringing
As with any switching regulator, there will be voltage ring-
ing on the SW node, especially for high input voltages.
The ringing amplitude and duration is dependent on the
switching speed (gate drive), layout (parasitic inductance)
and MOSFET output capacitance. This ringing contributes
to the overall EMI, noise and high frequency ripple. One
way to reduce ringing is to optimize layout. A good layout
minimizes parasitic inductance. Adding an RC snubber
from SW to GND is also an effective way to reduce ringing.
Finally, adding a resistor (10Ω to 100Ω) in series with the
BOOST pin will slow down the MOSFET turn-on slew rate
and dampen ringing, but at the cost of reduced efficiency.
Note that since the IC is buffered from high frequency
transients by PCB and bondwire inductances, the ringing
by itself is normally not a concern for reliability.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3603. Check the following in your layout:
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning
to the SGND pin at one point which is then connected
to the PGND pin close to the LTC3603.
2. Connect the (+) terminal of the input capacitor(s), C_IN, as
close as possible to the PV_IN pin. This capacitor provides
the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. You can connect the copper areas to any
DC net (PV_IN, INTV_CC, V_OUT, PGND, SGND, or any other
DC rail in your system).
3603fa
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