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LTC3603 Datasheet, PDF (12/22 Pages) Linear Technology – 2.5A, 15V Monolithic Synchronous Step-Down Regulator
LTC3603
APPLICATIONS INFORMATION
Burst Clamp Programming
If the voltage on the SYNC/MODE pin is in the range of
0.42V to 1V, Burst Mode operation is enabled. During
Burst Mode operation, the voltage on the SYNC/MODE
pin determines the burst clamp level. This level sets the
minimum peak inductor current, IBURST, for each switching
cycle according to the following equation:
VBURST
=
IBURST
6A/V
+
0.42V
VBURST is the voltage on the SYNC/MODE pin. IBURST can
be programmed in the range of 0A to 3.5A, which cor-
responds to a VBURST range of 0.42V to 1V. As the output
load current drops, the peak inductor current decreases
to keep the output voltage in regulation. When the output
load current demands a peak inductor current that is less
than IBURST, the burst clamp will force the peak inductor
current to remain equal to IBURST regardless of further
reductions in the load current. Since the average inductor
current is therefore greater than the output load current,
the voltage on the ITH pin will decrease. When the ITH
voltage drops to 330mV, sleep mode is enabled in which
both power MOSFETs are shut off along with most of the
circuitry to minimize power consumption. All circuitry is
turned back on and the power MOSFETs begin switching
again when the output voltage drops out of regulation. The
value for IBURST is determined by the desired amount of
output voltage ripple. As the value of IBURST increases, the
sleep time between pulses and the output voltage ripple
increases. The burst clamp voltage, VBURST, can be set
by a resistor divider from the INTVCC pin. Alternatively,
the SYNC/MODE pin may be tied directly to the VFB pin to
set VBURST = 0.6V (IBURST = 1A), or through an additional
divider resistor (R3) to set VBURST = 0.42V to 0.6V (see
Figure 2).
Pulse skipping, which is a compromise between low output
voltage ripple and efficiency, can be implemented by con-
necting the SYNC/MODE pin to ground. This sets IBURST to
0A. In this condition, the peak inductor current is limited by
the minimum on-time of the current comparator and the
lowest output voltage ripple is achieved while still operat-
ing discontinuously. During very light output loads, pulse
skipping allows only a few switching cycles to be skipped
while maintaining the output voltage in regulation.
Frequency Synchronization
The LTC3603’s internal oscillator can be synchronized to
an external 5V clock signal. During synchronization, the
top MOSFET turn-on is locked to the falling edge of the
external frequency source. The synchronization frequency
range is 300kHz to 3MHz. Synchronization only occurs if
the external frequency is greater than the frequency set by
the RT resistor. Because slope compensation is generated
by the oscillator’s internal ramp, the external frequency
should be set 25% higher than the frequency set by the
RT resistor to ensure that adequate slope compensation
is present. When synchronized, the LTC3603 will operate
in pulse-skipping mode.
INTVCC Regulator
The LTC3603 features an integrated P-channel low dropout
linear regulator (LDO) that supplies power to the INTVCC
supply pin from the PVIN pin. This LDO supply has been
designed to deliver up to 35mA of load current for the
powering of the internal gate drivers and other internal
circuitry. A small external load may also be applied provided
that the total current from the INTVCC supply does not
exceed 35mA. The INTVCC pin should be bypassed with
no less than a 0.22μF ceramic capacitor. A 1μF ceramic
capacitor is suitable for most applications.
INTVCC
LTC3603
R2
SYNC/MODE
R1
SGND
VBURST = 0.42V TO 1V
FB
LTC3603
R2
VOUT
R3 (OPTIONAL)
SYNC/MODE
R1
SGND
3603 F02
VBURST = 0.42V TO 0.6V
Figure 2. Programing the Burst Clamp
12
Topside MOSFET Driver Supply (BOOST Pin)
The LTC3603 uses a bootstrapped supply to power the
gate of the internal topside MOSFET (Figure 3). When the
topside MOSFET is off and the SW pin is low, diode DBST
charges capacitor CBST to the voltage on the INTVCC sup-
ply. In order to turn on the topside MOSFET, the voltage on
the BOOST pin is then applied to its gate. As the topside
MOSFET turns on, the SW pin rises to the PVIN voltage
3603fa