English
Language : 

LTC4010_15 Datasheet, PDF (15/24 Pages) Linear Technology – High Efficiency Standalone Nickel Battery Charger
LTC4010
Applications Information
Table 2. LTC4010 Charging Parameters
CHEM
BAT
STATE
PIN CHEMISTRY TIMER TMIN
TMAX ICHRG TERMINATION CONDITION
PC
Both
tMAX/12 5°C
45°C IPROG/5 Timer Expires
FC
Open
NiCd
tMAX
5°C
60°C IPROG –20mV per Cell or 2°C/Minute
GND
NiMH
tMAX
5°C
60°C IPROG 1.5°C/Minute for First tMAX/12 Minutes if Initial
VCELL < 1.325V
–10mV per Cell or 1°C/Minute After tMAX/12 Minutes
or if Initial VCELL > 1.325V
TOC
GND
NiMH
tMAX/3
5°C
60°C IPROG/10 Timer Expires
AR
Both
5°C
45°C
0 VCELL < 1.325V
PC: Precharge
FC: Fast Charge (Initial –∆V Termination Hold Off of tMAX/12 Minutes May Apply)
TOC: Top-Off Charge (Only for NiMH ∆T/∆t FC Termination After Initial tMAX/12 Period)
AR: Automatic Recharge (Temperature Limits Apply to State Termination Only)
Table 3. LTC4010 Time Limit Programming Examples
RTIMER
24.9k
33.2k
49.9k
66.5k
100k
TYPICAL FAST
CHARGE RATE
2C
1.5C
1C
0.75C
C/2
PRECHARGE LIMIT
(MINUTES)
3.8
5
7.5
10
15
FAST CHARGE
VOLTAGE STABILIZATION
(MINUTES)
3.8
5
7.5
10
15
FAST CHARGE LIMIT
(HOURS)
0.75
1
1.5
2
3
TOP-OFF
CHARGE
(MINUTES)
15
20
30
40
60
charging states. To some degree, the value should reflect
how closely the programmed charge current matches the
1C rate of targeted battery packs. The maximum fast charge
period is determined by the following equation:
RTIMER
=
tMAX (Hours)
30 • 10–6
(Ω)
Some typical timing values are detailed in Table 3. RTIMER
should not be less than 15k. The actual time limits used
by the LTC4010 have a resolution of approximately ±30
seconds in addition to the tolerances given the Electrical
Characteristics table. If the timer ends without a valid
–∆V or ∆T/∆t charge termination, the charger enters the
fault state. The maximum time period is approximately
4.3 hours.
Cell Voltage Network Design
An external resistor network is required to provide the
average single-cell voltage to the VCELL pin of the LTC4010.
The proper circuit for multicell packs is shown in Figure 3.
The ratio of R2 to R1 should be a factor of (n – 1), where
n is the number of series cells in the battery pack. The
value of R1 should be between 1k and 100k. This range
limits the sensing error caused by VCELL leakage current
and prevents the ON resistance of the internal NFET be-
tween VCDIV and GND from causing a significant error in
the VCELL voltage. The external resistor network is also
used to detect battery insertion and removal. The filter
BAT 10
LTC4010
VCELL 6
FOR TWO OR
MORE SERIES CELLS
+
R2
VCDIV
7
GND
4
4010 F03
R1
C1
R2 = R1(n – 1)
Figure 3. Multiple Cell Voltage Divider
4010fb
15