LTC4000-1 Datasheet, PDF (15/40 Pages) Linear Technology – High Voltage High Current Controller for Battery Charging with Maximum Power Point Control

LTC4000-1
Operation
The output voltage regulation loop regulates the voltage
at the CSP pin such that the output feedback voltage at
the OFB pin is 1.193V.
If the system load requires more power than is available
from the input, the battery ideal diode controller provides
supplemental power from the battery. When the battery
voltage discharges below 97.1% of the float voltage
(V_BFB < V_RECHRG(FALL)), the automatic recharge feature
initiates a new charge cycle.
Charge Current Regulation
The first loop involved in a normal charging cycle is the
charge current regulation loop (Figure 3). This loop drives
the ITH and CC pins. This loop ensures that the charge
current sensed through the charge current sense resistor
(R_CS) does not exceed the programmed full charge current.
TO SYSTEM
R_IS
CSP
BAT PMOS
C_CSP
CSP
CSN
LTC4000-1
C_IBMON
(OPTIONAL)
R_CL
IBMON
A9
g_m = 0.33m
60k
+
BIAS
–
50µA AT NORMAL ^1V –
5µA AT TRICKLE
A5
CL
CC
– _ITH
+
C_C
R_C
TO DC/DC
40001 FO3
Figure 3. Charge Current Regulation Loop
Battery Voltage Regulation
Once the float voltage is reached, the battery voltage regu-
lation loop takes over from the charge current regulation
loop (Figure 4).
The float voltage level is programmed using the feedback
resistor divider between the BAT pin and the FBG pin with
the center node connected to the BFB pin. Note that the
ground return of the resistor divider is connected to the
FBG pin. The FBG pin disconnects the resistor divider
load when V_IN < 3V to ensure that the float voltage resis-
tor divider does not consume battery current when the
battery is the only available power source. For V_IN ≥ 3V,
the typical resistance from the FBG pin to GND is 100Ω.
BAT
LTC4000-1
CC
R_BFB1
BFB
+
R_{BFB2 FBG}
1.136V
–
A6
– _ITH
+
C_C
R_C
TO DC/DC
40001 FO4
Figure 4. Battery Float Voltage Regulation Loop with FBG
Output Voltage Regulation
When charging terminates and the system load is com-
pletely supplied from the input, the PMOS connected to
BGATE is turned off. In this scenario, the output voltage
regulation loop takes over from the battery float voltage
regulation loop (Figure 5). The output voltage regulation
loop regulates the voltage at the CSP pin such that the
output feedback voltage at the OFB pin is 1.193V.
CSP
LTC4000-1
CC
R_OFB1
OFB
+
R_{OFB2 FBG}
1.193V
–
A7
– _ITH
+
C_C
R_C
TO DC/DC
40001 FO5
Figure 5. Output Voltage Regulation Loop with FBG
Battery Instant-On and Ideal Diode
The LTC4000-1 controls the external PMOS connected to
the BGATE pin with a controller similar to the input ideal
diode controller driving the IGATE pin. When not charg-
ing, the PMOS behaves as an ideal diode between the BAT
(anode) and the CSN (cathode) pins. The controller (A2)
regulates the external PMOS to achieve low loss conduc-
tion by driving the gate of the PMOS device such that the
voltage drop from the BAT pin to the CSN pin is 8mV.
When the ability to deliver a particular current with an 8mV
drop across the PMOS source and drain is exceeded, the
voltage at the gate clamps at V_BGATE(ON) and the PMOS
behaves like a fixed value resistor (R_DS(ON)).
The ideal diode behavior allows the battery to provide cur-
rent to the load when the input supply is in current limit
or the DC/DC converter is slow to react to an immediate
load increase at the output. In addition to the ideal diode
40001f
15