LTC3642 Datasheet, PDF (15/20 Pages) Linear Technology – High Effi ciency, High Voltage 50mA Synchronous Step-Down Converter

LTC3642
APPLICATIONS INFORMATION
Other losses, including C_IN and C_OUT ESR dissipative
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Thermal Considerations
The LTC3642 does not dissipate much heat due to its high
efficiency and low peak current level. Even in worst-case
conditions (high ambient temperature, maximum peak
current and high duty cycle), the junction temperature will
exceed ambient temperature by only a few degrees.
Design Example
As a design example, consider using the LTC3642 in an
application with the following specifications: V_IN = 24V,
V_OUT = 3.3V, I_OUT = 50mA, f = 250kHz. Furthermore, as-
sume for this example that switching should start when
V_IN is greater than 12V and should stop when V_IN is less
than 8V.
First, calculate the inductor value that gives the required
switching frequency:
L
=
⎛
⎝⎜
3.3V ⎞
250kHz • 115mA ⎠⎟
•
⎛
⎝⎜ ^1–
3.3V
24V
⎞
⎠⎟
≅
100μH
Next, verify that this value meets the L_MIN requirement.
For this input voltage and peak current, the minimum
inductor value is:
L_MIN
=
24V • 100ns
115mA
≅
22μH
Therefore, the minimum inductor requirement is satisfied,
and the 100μH inductor value may be used.
Next, C_IN and C_OUT are selected. For this design, C_IN should
be size for a current rating of at least:
I_RMS
=
50mA
•
3.3V
24V
•
24V
3.3V
–
1
≅
18mA_RMS
Due to the low peak current of the LTC3642, decoupling
the V_IN supply with a 1μF capacitor is adequate for most
applications.
C_OUT will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement. For a 1%
output ripple, the value of the output capacitor ESR can
be calculated from:
ΔV_OUT = 0.01 ≤ 115mA • ESR
A capacitor with a 90mΩ ESR satisfies this requirement.
A 10μF ceramic capacitor has significantly less ESR than
90mΩ.
The output voltage can now be programmed by choosing
the values of R1 and R2. Choose R2 = 240k and calculate
R1 as:
R1=
⎛
⎝⎜
V_OUT
0.8V
–
⎞
1_⎠⎟
• R2
=
750k
The undervoltage lockout requirement on V_IN can be
satisfied with a resistive divider from V_IN to the RUN and
HYST pins. Choose R1 = 2M and calculate R2 and R3 as
follows:
R2
=
⎛
⎜
⎝
1.21V
V_IN(RISING) –
1.21V
⎞
⎟
⎠
•
R1=
224k
R3
=
⎛
⎜
⎝
1.1V
V_IN(FALLING)
–
1.1V
⎞
⎟
⎠
•
R1–
R2
=
90.8k
Choose standard values for R2 = 226k and R3 = 91k. The
I_SET pin should be left open in this example to select maxi-
mum peak current (115mA). Figure 9 shows a complete
schematic for this design example.
V_IN
24V
V_IN
SW
2M
LTC3642
100μH
V_OUT
3.3V
50mA
1μF
RUN
I_SET
10μF
226k
SS
750k
HYST
V_FB
91k
GND
240k
3642 F09
Figure 9. 24V to 3.3V, 50mA Regulator at 250kHz
3642f
15