LTC3624_15 Datasheet, PDF (15/20 Pages) Linear Technology – 17V, 2A Synchronous Step-Down Regulator with 3.5A Quiescent Current

LTC3624/LTC3624-2
Applications Information
the heat dissipated may exceed the maximum junction
temperature of the part. If the junction temperature reaches
approximately 160°C, both power switches will be turned
off until the temperature drops about 15°C cooler.
To avoid the LTC3624/LTC3624-2 from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis
is to determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T_RISE = P_D • θ_JA
As an example, consider the case when the LTC3624/
LTC3624-2 is used in applications where V_IN = 12V, I_OUT = 2A,
f = 1MHz, V_OUT = 1.8V. The equivalent power MOSFET
resistance R_SW is:
R_SW
= R_DS(ON)TOP
•
V_OUT
V_IN
+R_DS(ON)BOT
•
_1–
V_OUT
V_IN


=
200mΩ
•
1.8V
12V
+
100mΩ
•
_1–
1.8V
12V


= 115mΩ
The V_IN current during 1MHz force continuous operation
with no load is about 8mA, which includes switching and
internal biasing current loss, transition loss, inductor core
loss and other losses in the application. Therefore, the
total power dissipated by the part is:
P_D = I_OUT2 • R_SW + V_IN • I_IN(Q)
= 2A² • 115mΩ + 12V • 8mA
= 556mW
The DFN 3mm × 3mm package junction-to-ambient thermal
resistance, θ_JA, is around 43°C/W. Therefore, the junction
temperature of the regulator operating in a 25°C ambient
temperature is approximately:
T_J = T_A + T_rise = 25°C + 0.556W • 43°C/W = 49°C
Remembering that the above junction temperature is
obtained from an R_DS(ON) at 25°C, we might recalculate
the junction temperature based on a higher R_DS(ON) since
it increases with temperature. Redoing the calculation
assuming that R_SW increased 5% at 49°C yields a new
junction temperature of 50°C. If the application calls for
a higher ambient temperature and/or higher switching
frequency, care should be taken to reduce the temperature
rise of the part by using a heat sink or forced air flow.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3624/LTC3624-2 (refer to Figure 3). Check the
following in your layout:
1. Do the capacitors C_IN connect to the V_IN and GND as
close as possible? These capacitors provide the AC
current to the internal power MOSFETs and their drivers.
2. Are C_OUT and L closely connected? The (–) plate of
C_OUT returns current to GND and the (–) plate of C_IN.
3. The resistive divider, R1 and R2, must be connected
between the (+) plate of C_OUT and a ground line ter-
minated near GND. The feedback signal V_FB should be
routed away from noisy components and traces, such
as the SW line, and its trace length should be minimized.
Keep R1 and R2 close to the IC.
4. Solder the exposed pad (Pin 9) on the bottom of the
package to the GND plane. Connect this GND plane to
other layers with thermal vias to help dissipate heat
from the LTC3624/LTC3624-2.
5. Keep sensitive components away from the SW pin. The
input capacitor, C_IN, feedback resistors, and INTV_CC
bypass capacitors should be routed away from the SW
trace and the inductor.
6. A ground plane is preferred.
For more information www.linear.com/LTC3624
36242fc
15