LTC3624_15 Datasheet, PDF (14/20 Pages) Linear Technology – 17V, 2A Synchronous Step-Down Regulator with 3.5A Quiescent Current

LTC3624/LTC3624-2
Applications Information
shown in Figure 1. Capacitor C_FF provides phase lead by
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to application Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1µF) input capacitors.
The discharge input capacitors are effectively put in paral-
lel with C_OUT, causing a rapid drop in V_OUT. No regulator
can deliver enough current to prevent this problem if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates
current limiting, short-circuit protection and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 +…)
where L1, L2, etc. are the individual losses as a percent-
age of input power. Although all dissipative elements in
the circuit produce losses, three main sources usually
account for most of the losses in LTC3624/LTC3624-2
circuits: 1) I²R losses, 2) switching and biasing losses,
3) other losses.
1. I²R losses are calculated from the DC resistances of
the internal switches, R_SW, and external inductor, R_L.
In continuous mode, the average output current flows
through inductor L but is “chopped” between the
internal top and bottom power MOSFETs. Thus, the
series resistance looking into the SW pin is a function
of both top and bottom MOSFET R_DS(ON) and the duty
cycle (DC) as follows:
R_SW = (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)
The R_DS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus to obtain I²R losses:
I²R losses = I_OUT2(R_SW + R_L)
2. The switching current is the sum of the MOSFET driver
and control currents. The power MOSFET driver current
results from switching the gate capacitance of the power
MOSFETs. Each time a power MOSFET gate is switched
from low to high to low again, a packet of charge dQ
moves from IN to ground. The resulting dQ/dt is a cur-
rent out of IN that is typically much larger than the DC
control bias current. In continuous mode, I_GATECHG =
f(Q_T + Q_B), where Q_T and Q_B are the gate charges of
the internal top and bottom power MOSFETs and f is
the switching frequency. The power loss is thus:
Switching Loss = I_GATECHG • V_IN
The gate charge loss is proportional to V_IN and f and
thus their effects will be more pronounced at higher
supply voltages and higher frequencies.
3. Other “hidden” losses such as transition loss and cop-
per trace and internal load resistances can account for
additional efficiency degradations in the overall power
system. It is very important to include these “system”
level losses in the design of a system. Transition loss
arises from the brief amount of time the top power
MOSFET spends in the saturated region during switch
node transitions. The LTC3624/LTC3624-2 internal
power devices switch quickly enough that these losses
are not significant compared to other sources. These
losses plus other losses, including diode conduction
losses during dead-time and inductor core losses,
generally account for less than 2% total additional loss.
Thermal Conditions
In a majority of applications, the LTC3624/LTC3624-2 does
not dissipate much heat due to its high efficiency and
low thermal resistance of its exposed pad DFN package.
However, in applications where the LTC3624/LTC3624-2
is running at high ambient temperature, high V_IN, high
switching frequency, and maximum output current load,
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