LTC3601_15 Datasheet, PDF (15/26 Pages) Linear Technology – 1.5A, 15V Monolithic Synchronous Step-Down Regulator

LTC3601
APPLICATIONS INFORMATION
a soft-start function by connecting a capacitor from the
TRACK pin to ground. The relationship between output
rise time and TRACK capacitance is given by:
t_SS = 430,000 × C_TRACK
A default internal soft-start timer forces a minimum soft-
start time of 400μs by overriding the TRACK pin input
during this time period. Hence, capacitance values less
than approximately 1000pF will not significantly affect
soft-start behavior.
When using the TRACK pin, the regulator defaults to
Burst Mode operation until the output exceeds 80% of
its final value (V_FB > 0.48V). Once the output reaches this
voltage, the operating mode of the regulator switches to
the mode selected by the MODE/SYNC pin as described
above. During normal operation, if the output drops below
10% of its final value (as it may when tracking down, for
instance), the regulator will automatically switch to Burst
Mode operation to prevent inductor saturation and improve
TRACK pin accuracy.
Output Power Good
The PGOOD output of the LTC3601 is driven by a 15Ω
(typical) open-drain pull-down device. This device will be
turned off once the output voltage is within 5% (typical) of
the target regulation point allowing the voltage at PGOOD
to rise via an external pull-up resistor (100k typical). If
the output voltage exits a 8% (typical) regulation window
around the target regulation point the open-drain output
will pull down with 15Ω output resistance to ground, thus
dropping the PGOOD pin voltage. A filter time of 40μs
(typical) acts to prevent unwanted PGOOD output changes
during V_OUT transient events. As a result, the output volt-
age must be within the target regulation window of 5%
for 40μs before the PGOOD pin is pulled high. Conversely,
the output voltage must exit the 8% regulation window for
40μs before the PGOOD pin pulls to ground (see Figure 4).
NOMINAL OUTPUT
PGOOD
VOLTAGE
–8% –5% 0% 5%
V_OUT
8%
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Figure 4. PGOOD Pin Behavior
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 +…)
where L1, L2, etc. are the individual loss terms as a per-
centage of input power.
Although all dissipative elements in the circuit produce
losses, three main sources account for the majority of the
losses in the LTC3601: 1) I²R loss, 2) switching losses
and quiescent current loss, 3) transition losses and other
system losses.
1. I²R loss is calculated from the DC resistances of the
internal switches, R_SW, and external inductor, R_L. In
continuous mode, the average output current will
flow through inductor L but is “chopped” between the
internal top and bottom power MOSFETs. Thus, the
series resistance looking into the SW pin is a function
of both the top and bottom MOSFET’s R_DS(ON) and the
duty cycle (DC) as follows:
R_SW = (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)
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