LTC3418 Datasheet, PDF (15/20 Pages) Linear Technology – 8A, 4MHz, Monolithic Synchronous Step-Down Regulator

LTC3418
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3418. Check the following in your layout.
1. A ground plane is recommended. If a ground plane layer
is not used, the signal and power grounds should be
segregated with all small-signal components returning to
the SGND pin at one point which is then connected to the
PGND pin close to the LTC3418.
2. Connect the (+) terminal of the input capacitor(s), C_IN,
as close as possible to the PV_IN pin. This capacitor
provides the AC current into the internal power MOSFETs.
3. Keep the switching node, SW, away from all sensitive
small-signal nodes.
4. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise of
power components. You can connect the copper areas to
any DC net (PV_IN, SV_IN, V_OUT, PGND, SGND or any other
DC rail in your system).
5. Connect the V_FB pin directly to the feedback resistors.
The resistor divider must be connected between V_OUT and
SGND.
6. To minimize switching noise coupling to SV_IN, place a
local filter between SV_IN and PV_IN.
Top Layer
Figure 5. LTC3418 Layout Diagram
Bottom Layer
3418f
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