LTC3802 Datasheet, PDF (14/28 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking

LTC3802
APPLICATIO S I FOR ATIO
Compensating a switching power supply feedback loop is
a complex task. The applications shown in this data sheet
show typical values, optimized for the power components
shown. Though similar power components should suf-
fice, substantially changing even one major power com-
ponent may degrade performance significantly. Stability
also may depend on circuit board layout. To verify the
calculated component values, all new circuit designs
should be prototyped and tested for stability.
Overvoltage Protection and Power Good Flag
Notice that the FB pin is the feedback amplifier’s virtual
ground node (offset by V_REF). Because the typical com-
pensation network does not include local DC feedback
around the amplifier, the DC level at FB will be an accurate
replica of the output voltage, divided down by the resistive
divider. However, the compensation capacitors will tend
to attenuate AC signals at FB, especially during quick
transients. Because of this delay in the servo loop, the duty
cycle is not able to adjust immediately to shifts in the
output voltage. This problem is most apparent at high
input and low output voltages. Under transient conditions,
a slow reaction in the duty cycle could cause a large step
in the output voltage. The LTC3802 avoids this voltage
instability through the use of an additional comparator
input pin, CMPIN, which provides real time measurement
of the output voltage. A duplicate FB divider, R1 and R_B
should be connected to this pin. A small feedforward
capacitor can be added across the top resistor to speed up
the comparators.
The MAX comparator monitors the output voltage through
the CMPIN pin. If the output moves 5% above its nominal
value, the comparator immediately turns the top MOSFET
(QT) off and the bottom MOSFET (QB) on and maintains
this state until the output falls back within 5% of its nomi-
nal value. This pulls the output down as fast as possible,
preventing damage to the (often expensive) load. If CMPIN
rises because the output is shorted to a higher supply, QB
will stay on until the short goes away, the higher supply
current limits or QB dies trying to save the load. This be-
havior provides maximum protection against overvoltage
fault at the output, while allowing the circuit to resume
normal operation when the fault is removed.
CMPIN is also used as the input for the positive power good
comparator PPG and the negative power good comparator
NPG. The PPG comparator goes high if the potential at
CMPIN is 10% above the nominal value. The NPG compara-
tor fires if CMPIN potential is 10% lower than the nominal
value. The output of PPG and NPG is connected to the
PGOOD pin through the transistor MPG (see Block Dia-
gram). PGOOD is an open-drain output and requires an
external pull-up resistor. If channel 1 and 2 regulator out-
put voltages are within ±10% of their nominal values, the
transistor MPG shuts off and PGOOD is pulled high by the
external pull-up resistor. If any of the two outputs is out-
side the 10% window for more than 100µs, PGOOD pulls
low indicating that at least one output is out of regulation.
For PGOOD to go high, both switcher outputs must be in
regulation. PGOOD remains active during soft-start and cur-
rent limit. Upon power-up, PGOOD is forced low. As soon
as the RUN/SS pin rises above the shutdown threshold, the
power good comparators take over and control the transis-
tor MPG directly. The 100µs delay ensures that short out-
put transient glitches that are successfully “caught” by the
power good comparators don’t cause momentary glitches
at the PGOOD pin.
Current Limit Protection
The LTC3802 includes an onboard current limit circuit that
limits the maximum output current to a user-programmed
level. It works by sensing the voltage drop across QB when
QB is on and comparing that voltage to a user-pro-
grammed voltage at I_MAX. The I_MAX pin includes a trimmed
10µA pull-up, enabling the user to set the voltage at I_MAX
with a single resistor, R_IMAX, to ground. The current
comparator reference input is equal to V_IMAX divided by 5
(see Block Diagram).
Any time QB is on and the current flowing to the output is
reasonably large, the SW node at the drain of QB will be
somewhat negative with respect to PGND. Since QB looks
like a low value resistor during its on-time, the voltage
drop across it is proportional to the current flowing in it.
The LTC3802 senses this voltage, inverts it and compares
it to the current comparator reference. The current com-
parator begins limiting the output current when the mag-
nitude of the negative voltage is larger than its reference.
3802f
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