LTC3802 Datasheet, PDF(10/28 Page) Linear Technology – Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

LTC3802 Datasheet, PDF (10/28 Pages) Linear Technology – Dual 550kHz Synchronous 2-Phase DC/DC Controller with Programmable Up/Down Tracking

◁

LTC3802

PI FU CTIO S (28-Pin SSOP/32-Pin QFN Package)

PHASEMD (Pin 17/Pin 15): Phase Selector Input. This pin

determines the phase relationships between controllerâ£ 1,

controller 2 and the PLLIN signal. When PHASEMD is

floating, its value is around 2V, and the internal phase-

locked loop synchronizes the falling edge of TG1 to the

falling edge of the PLLIN signal. When PHASEMD is forced

high, PLLIN leads TG1 by 90Â°. TG1 and TG2 remain at 180Â°

out of phase independent of the PHASEMD input. When

PHASEMD is forced low, an internal current source dis-

charges the RUN/SS slowly to provide power down track-

ing. Avoid coupling noise into this sensitive pin.

FB2 (Pin 18/Pin 16): Channel 2 Controller Error Amplifier

Input. See FB1.

COMP2 (Pin 19/Pin 17): Channel 2 Controller Error Am-

plifier Output. See COMP1.

VCC (Pin 20/Pin 18): Power Supply Input. All the internal

circuits except the switcher output drivers are powered

from this pin. VCC should be connected to a low noise 5V

supply and should be bypassed to SGND with at least a

10ÂµF capacitor in close proximity to the LTC3802.

CMPIN2 (Pin 21/Pin 19): Channel 2 Controller Compara-

tors Input. See CMPIN1.

IMAX2 (Pin 22/Pin 20): Channel 2 Controller Current Limit

Set. See IMAX1.

PLLLPF (Pin 23/Pin 21): Phase-Locked Loop Lowpass

Filter. The phase-locked loopâs lowpass filter is tied to this

pin. Alternatively, this pin can be driven with an AC or DC

voltage source to vary the frequency of the internal

oscillator.

PLLIN (Pin 24/Pin 22): Phase-Locked Loop Input/Exter-

nal Synchronization Input to the Phase Detector. The

falling edge of this signal is used for frequency synchro-

nization. When PLLIN floats or shorts to ground, the

controllers free run at 550kHz.

SW2 (Pin 25/Pin 25): Channel 2 Controller Switching

Node. See SW1.

TG2 (Pin 26/Pin 26): Channel 2 Controller Top Gate Drive.

See TG1.

BOOST2 (Pin 27/Pin 27): Channel 2 Controller Top Gate

Driver Supply. See BOOST1.

BG2 (Pin 28/Pin 28): Channel 2 Controller Bottom Gate

Drive. See BG1.

Exposed Pad (Pin 33, QFN Package Only): Exposed Pad

is PGND, must be soldered to PCB.

3802f

▷