LTC1742_15 Datasheet, PDF(14/20 Page) Linear Technology

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LTC1742_15 Datasheet, PDF (14/20 Pages) Linear Technology – 14-Bit, 65Msps Low Noise ADC

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LTC1742

APPLICATIO S I FOR ATIO

mode voltage of any external input circuitry; additionally,

the reference is used with a difference amplifier to gener-

ate the differential reference levels needed by the internal

ADC circuitry.

An external bypass capacitor is required for the 2.35V

reference output, VCM. This provides a high frequency low

impedance path to ground for internal and external cir-

cuitry. This is also the compensation capacitor for the

reference. It will not be stable without this capacitor.

The difference amplifier generates the high and low refer-

ence for the ADC. High speed switching circuits are

connected to these outputs and they must be externally

bypassed. Each output has two pins: REFHA and REFHB

for the high reference and REFLA and REFLB for the low

reference. The doubled output pins are needed to reduce

package inductance. Bypass capacitors must be con-

nected as shown in Figure 5.

Other voltage ranges in between the pin selectable ranges

can be programmed with two external resistors as shown

in Figure 6a. An external reference can be used by applying

its output directly or through a resistor divider to SENSE.

It is not recommended to drive the SENSE pin with a logic

device since the logic threshold is close to ground and

2.35V

TIE TO VDD FOR 3.2V RANGE;

TIE TO GND FOR 2V RANGE;

RANGE = 2 â¢ VSENSE FOR

1V < VSENSE < 1.6V

1ÂµF

LTC1742

VCM

4.7ÂµF

4â¦ 2.35V BANDGAP

REFERENCE

1.6V 1V

SENSE

REFLB

0.1ÂµF

REFHA

RANGE

DETECT

AND

CONTROL

BUFFER

INTERNAL ADC

HIGH REFERENCE

4.7ÂµF

DIFF AMP

1ÂµF

REFLA

0.1ÂµF

REFHB

INTERNAL ADC

LOW REFERENCE

1742 F05

Figure 5. Equivalent Reference Circuit

VDD. The SENSE pin should be tied high or low as close to

the converter as possible. If the SENSE pin is driven

externally, it should be bypassed to ground as close to the

device as possible with a 1ÂµF ceramic capacitor.

Input Range

The input range can be set based on the application. For

oversampled signal processing in which the input fre-

quency is low (<10MHz), the largest input range will

provide the best signal-to-noise performance while main-

taining excellent SFDR. For high input frequencies

(> 40MHz), the 2V range will have the best SFDR perfor-

mance for the 2nd and 3rd harmonics, but the SNR will

degrade by 3.5dB. See the Typical Performance Charac-

teristics section.

Driving the Encode Inputs

The noise performance of the LTC1742 can depend on the

encode signal quality as much as on the analog input. The

ENC/ENC inputs are intended to be driven differentially,

primarily for noise immunity from common mode noise

sources. Each input is biased through a 6k resistor to a 2V

bias. The bias resistors set the DC operating point for

transformer coupled drive circuits and can set the logic

threshold for single-ended drive circuits.

2.35V

12.5k

1.1V

11k

VCM

4.7ÂµF

SENSE LTC1742

1ÂµF

1742 F06a

Figure 6a. 2.2V Range ADC

0.1ÂµF

2.35V

6 1.25V

LT1790-1.25

1, 2

VCM

4.7ÂµF

SENSE LTC1742

1ÂµF

1742 F06b

Figure 6b. 2.5V Range ADC with External Reference

1742f

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