LTC3725 Datasheet, PDF (13/20 Pages) Linear Technology – Single-Switch Forward Controller and Gate Driver

LTC3725
APPLICATIO S I FOR ATIO
Since the power dissipation of the linear regulator is
proportional to the input voltage, this strategy of making
the timeout inversely proportional to the input voltage
produces an approximately constant temperature excur-
sion for the external NMOS of the linear regulator regard-
less of the input voltage.
In situations for which the continuous operation of the
linear regulator does not exceed the thermal limitations of
the external NMOS (i.e. converters with low V_IN or with
minimal gate drive bias requirements), the auxiliary sup-
ply can be omitted and the linear regulator allowed to
operate continuously. If I_NDRV is less than 0.27mA the
linear regulator never times out and the voltage on the
SSFLT pin stays at approximately 2.8V after start-up is
completed. To accomplish this set:
R_PULLUP
>
V_IN(MAX) – V_NDRV
0.27mA
where V_IN(MAX) is the maximum expected continuous
input voltage. Note that once the linear regulator is turned
off it locks out. Therefore when using this strategy, care
should be taken to ensure that a transient higher than
V_IN(MAX) does not persist longer than t_TIMEOUT.
In secondary-side operation with the LTC3706, there is
never any need for continuous operation of the linear
regulator since gate drive bias power is provided by the
LTC3706 through the pulse transformer and on-chip
rectifier. The LTC3725 shuts down the linear regulator
once the LTC3706 begins switching the pulse trans-
former. If the LTC3706 fails to start, the LTC3725 quickly
times out the linear regulator once the voltage on the
SSFLT pin reaches 2.8V.
Fault Lockout
The LTC3725 indicates a fault by pulling the SSFLT pin to
within 1V of V_CC. The LTC3725 subsequently attempts a
restart. Optionally, the user can prevent restart and “lock
out” the converter by clamping the voltage on the SSFLT
pin with a 4.3V zener diode. Once the converter has locked
out it can only be restarted by the removal of the input
voltage or by release of the zener diode clamp.
Pulse Transformer
The pulse transformer that connects the LTC3706 to the
LTC3725 performs the dual functions of gate drive duty
cycle encoding and gate drive bias supply for the LTC3725
by way of the on-chip full-wave rectifier. The designs of the
LTC3725 and LTC3706 have been coordinated so that the
transformer turn ratio is:
N_LTC3725 = 2N_LTC3706
where N_LTC3725 is the number of turns in the winding
connected to the FB/IN⁺ and FS/IN^– pins of the LTC3725
and N_LTC3706 is the number of turns in the winding
connected to the PT⁺ and PT^– pins of the LTC3706. The
winding connected to the LTC3706 must be able to with-
stand volt-seconds equal to:
(V
–
s)_MAX
=
V_CC
2f
where V_CC is the maximum supply voltage for the LTC3706
and f is the operating frequency of the LTC3706.
3725f
13