LTC3619B_15 Datasheet, PDF (13/20 Pages) Linear Technology – 400mA/800mA Synchronous Step-Down DC/DC with Average Input Current Limit

LTC3619B
Applications Information
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to DI_LOAD • ESR, where ESR is the effective series
resistance of C_OUT. DI_LOAD also begins to charge or dis-
charge C_OUT generating a feedback error signal used by the
regulator to return V_OUT to its steady-state value. During
this recovery time, V_OUT can be monitored for overshoot
or ringing that would indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine the
phase margin. In addition, feedback capacitors (C_F1 and
C_F2) can be added to improve the high frequency response,
as shown in Figure 2. Capacitor C_F provides phase lead by
creating a high frequency zero with R2 which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1µF) input capacitors.
The discharged input capacitors are effectively put in paral-
lel with C_OUT, causing a rapid drop in V_OUT. No regulator
can deliver enough current to prevent this problem if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection, and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four sources usually account for the losses in
LTC3619B circuits: 1) V_IN quiescent current, 2) switching
losses, 3) I²R losses, 4) other system losses.
1. The V_IN current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET
driver and control currents. V_IN current results in a
small (<0.1%) loss that increases with V_IN, even at
no load.
2. The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from V_IN to ground. The resulting dQ/dt is a current
out of V_IN that is typically much larger than the DC bias
current. In continuous mode, I_GATECHG = f_O(Q_T + Q_B),
where Q_T and Q_B are the gate charges of the internal
top and bottom MOSFET switches. The gate charge
losses are proportional to V_IN and thus their effects
will be more pronounced at higher supply voltages.
3. I²R losses are calculated from the DC resistances of
the internal switches, R_SW, and external inductor, R_L.
In continuous mode, the average output current flows
through inductor L, but is “chopped” between the internal
top and bottom switches. Thus, the series resistance
looking into the SW pin is a function of both top and
bottom MOSFET R_DS(ON) and the duty cycle (DC) as
follows:
R_SW = (R_DS(ON)TOP) • (DC) + (R_DS(ON)BOT) • (1– DC)
The R_DS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I²R losses:
I²R losses = I_OUT2 • (R_SW + R_L)
3619bfb
13