LTC3565_12 Datasheet, PDF (13/22 Pages) Linear Technology – 1.25A, 4MHz, Synchronous Step-Down DC/DC Converter

LTC3565
APPLICATIONS INFORMATION
drop of the first cycle. Thus, a good place to start is with
the output capacitor value of approximately:
C_OUT
≈
2.5
f_O
ΔI_OUT
• V_DROOP
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance
to the supply is very low. A 10μF ceramic capacitor is
usually enough for these conditions.
Setting the Output Voltage
The LTC3565 develops a 0.6V reference voltage between
the feedback pin, V_FB, and the signal ground as shown in
Figure 4. The output voltage is set by a resistive divider
according to the following formula:
V_OUT ≈ 0.6V ^{⎛⎝⎜}1+ ^{RR21⎞⎠⎟}
Keeping the current small (<5μA) in these resistors maxi-
mizes efficiency, but making them too small may allow
stray capacitance to cause noise problems and reduce the
phase margin of the error amp loop.
To improve the frequency response, a feed-forward capaci-
tor C_F may also be used. Great care should be taken to
route the V_FB line away from noise sources, such as the
inductor or the SW line.
Shutdown and Soft-Start
Pulling the RUN pin high allows an internal soft-start circuit
to slowly ramp the output voltage up until regulation.
Soft-start prevents surge currents from V_IN by gradually
ramping the output voltage up during start-up. The output
will ramp from zero to full scale over a time period of ap-
proximately 0.9ms. This prevents the LTC3565 from having
to quickly charge the output capacitor and thus supplying
an excessive amount of instantaneous current.
The LTC3565 can start into a back-biased output in force
continuous operation. When the output is pre-biased at
either a higher or lower value than the regulated output
voltage, the LTC3565 will sink or source current as needed
to bring the output back into regulation. However, during
soft-start the regulator will always start in pulse skip
mode ignoring the mode selected with the SYNC/MODE
pin. This prevents the output from discharging to below
the regulation point when soft-starting.
Mode Selection and Frequency Synchronization
The SYNC/MODE pin is a multipurpose pin which provides
mode selection and frequency synchronization. Connect-
ing this pin to V_IN enables Burst Mode operation, which
provides the best low current efficiency at the cost of a
higher output voltage ripple. When this pin is connected to
ground, pulse skipping operation is selected which provides
the lowest output voltage and current ripple at the cost
of low current efficiency. Applying a voltage that is half
the value of the input voltage results in forced continuous
mode, which creates a fixed output ripple and is capable of
sinking up to 0.4A. Since the switching noise is constant
in this mode, it is also the easiest to filter out.
The LTC3565 can also be synchronized to an external
clock signal by the SYNC/MODE pin. The internal oscilla-
tor frequency should be set to ±20% of the external clock
frequency to ensure adequate slope compensation, since
slope compensation is derived from the internal oscillator.
During synchronization, the mode is set to pulse skipping
and the top switch turn on is synchronized to the falling
edge of the external clock.
3565fb
13