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LTC3544_15 Datasheet, PDF (13/16 Pages) Linear Technology – Quad Synchronous Step-Down Regulator
LTC3544
APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3544. These items are also illustrated graphically
in Figures 3 and 4. Check the following in your layout:
1. The power traces, consisting of the PGND trace, the
GNDA trace, the SW traces, the PVIN trace and the VCC
trace should be kept short, direct and wide.
2. Does each of the VFBx pins connect directly to the
respective feedback resistors? The resistive dividers
must be connected between the (+) plate of the corre-
sponding output filter capacitor (e.g., C13) and GNDA.
If the circuit being powered is at such a distance from
the part where voltage drops along circuit traces are
large, consider a Kelvin connection from the powered
circuit back to the resistive dividers.
3. Keep C8 and C9 as close to the part as possible.
4. Keep the switching nodes (SWx) away from the sensi-
tive VFBx nodes.
5. Keep the ground connected plates of the input and
output capacitors as close as possible.
6. Care should be taken to provide enough space between
unshielded inductors in order to minimize any trans-
former coupling.
Design Example
As a design example, consider using the LTC3544 as a
portable application with a Li-Ion battery. The battery
provides VIN ranging from 2.8V to 4.2V. The demand at
2.5V is 250mA necessitating the use of the 300mA output
for this requirement.
VOUT1
C13
VOUT3
C4
VOUT2
C10
VCC
L4 2.25V TO 5.5V
C8
GNDA
R15
C15
R16 RUN100
SW1000 VCC GNDA VFB200A
RUN100
VFB200B
VFB100
VFB100
LTC3544
VFB300
VFB300
RUN200A RUN200A
RUN300
RUN300
L2 SW200A
SW200A
RUN200B
RUN200B
R5
C6
SW200B PGND PVIN SW300
R6
VFB200A
SW200B
C9
SW300 L1
L3
R8
C12
VFB200B
PGND
PVIN
2.25V TO 5.5V
R11
Figure 3. LTC3544 Layout Diagram
R2
C1
R3
VOUT4
C3
3544 F03
C1
C4
GND
L1
L4
VCC
C9
L2
C10
L3
C2 C3
PGND
3544 F04
Figure 4. LTC3544 Suggested Layout
3544fa
13