LTC3371_15 Datasheet, PDF (13/26 Pages) Linear Technology – 4-Channel 8A Configurable Buck DC/DCs with Watchdog and Power-On Reset

LTC3371
Pin Functions (QFN/TSSOP)
V_INE (Pin 22/Pin 26): Power Stage E Input Supply. Bypass
to GND with a 10µF or larger ceramic capacitor.
SWE (Pin 23/Pin 27): Power Stage E Switch Node. External
inductor connects to this pin.
SWF (Pin 24/Pin 28): Power Stage F Switch Node. External
inductor connects to this pin.
V_INF (Pin 25/Pin 29): Power Stage F Input Supply. Bypass
to GND with a 10µF or larger ceramic capacitor.
V_ING (Pin 26/Pin 30): Power Stage G Input Supply. Bypass
to GND with a 10µF or larger ceramic capacitor.
SWG (Pin 27/Pin 31): Power Stage G Switch Node. External
inductor connects to this pin.
SWH (Pin 28/Pin 32): Power Stage H Switch Node. External
inductor connects to this pin.
V_INH (Pin 29/Pin 33/): Power Stage H Input Supply. Bypass
to GND with a 10µF or larger ceramic capacitor.
FB4 (Pin 30/Pin 34): Buck Regulator 4 Feedback Pin.
Receives feedback by a resistor divider connected across
the output.
EN4 (Pin 31/Pin 35): Buck Regulator 4 Enable Input.
Active high. Do not float.
RST4 (Pin 32/Pin 36): Buck Regulator 4 Reset Pin
(Active Low). Open-drain output. When Buck 4 is disabled
or its regulated output voltage is more than 5% below its
programmed level, this pin is driven low. Assertion delay
is scaled by the C_T capacitor.
RT (Pin 33/Pin 37): Oscillator Frequency Pin. This pin
provides two modes of setting the switching frequency.
Connecting a resistor from RT to ground sets the switching
frequency based on the resistor value. If RT is tied to V_CC
the internal 2MHz oscillator is used. Do not float.
PLL/MODE (Pin 34/Pin 38): Oscillator Synchronization
and Buck Mode Select Pin. Driving PLL/MODE with an
external clock signal synchronizes all switches to the
applied frequency, and the buck converters operate in
forced continuous mode. The slope compensation is au-
tomatically adapted to the external clock frequency. The
absence of an external clock signal enables the frequency
programmed by the RT pin. When not synchronizing to
an external clock this input determines how the LTC3371
operates at light loads. Pulling this pin to ground selects
Burst Mode operation. Tying this pin to V_CC invokes forced
continuous mode operation. Do not float.
V_CC (Pin 35/Pin 1): Internal Bias Supply. Bypass to GND
with a 10µF or larger ceramic capacitor.
TEMP (Pin 36/Pin 2): Temperature Indication Pin. TEMP
outputs a voltage of 220mV (typical) at 25°C. The TEMP
voltage increases by 7mV/°C (typical) at higher tempera-
tures giving an external indication of the LTC3371 internal
die temperature.
RST1 (Pin 37/Pin 3): Buck Regulator 1 Reset Pin (Active
Low). Open-drain output. When Buck 1 is disabled or
its regulated output voltage is more than 2% below its
programmed level, this pin is driven low. Assertion delay
is scaled by the C_T capacitor.
EN1 (Pin 38/Pin 4): Buck Regulator 1 Enable Input. Active
high. Do not float.
GND (Exposed Pad Pin 39): Ground. The exposed pad
must be connected to a continuous printed circuit board
ground plane directly under the LTC3371.
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