LTC3405A_15 Datasheet, PDF (12/16 Pages) Linear Technology – 1.5MHz, 300mA Synchronous Step-Down Regulator in ThinSOT

LTC3405A
APPLICATIO S I FOR ATIO
V_OUT
VIA TO V_IN
PIN 1
L1
LTC3405A
SW
VIA TO GND
R1
R2
C_FWD
V_IN
VIA TO V_OUT
C_OUT
C_IN
GND
Figure 6. LTC3405A Suggested Layout
3405A F06
1. The power traces, consisting of the GND trace, the SW
trace and the V_IN trace should be kept short, direct and
wide.
2. Does the V_FB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of C_OUT and ground.
3. Does the (+) plate of C_IN connect to V_IN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of C_IN and C_OUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
V_FB node.
Design Example
As a design example, assume the LTC3405A is used in a
single lithium-ion battery-powered cellular phone
application. The V_IN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.25A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
2.5V. With this information we can calculate L using
equation (1),
L
=
1
(^f)(^∆I_L )
V_OUT
⎛⎝⎜_1−
V_OUT
V_IN
⎞
⎠⎟
(3)
Substituting V_OUT = 2.5V, V_IN = 4.2V, ∆I_L = 100mA and
f = 1.5MHz in equation (3) gives:
L
=
2.5V
1.5MHz(100mA)
⎛⎝⎜₁
−
2.5V
4.2V
⎞⎠⎟
≅
6.8µH
For best efficiency choose a 300mA or greater inductor
with less than 0.3Ω series resistance.
C_IN will require an RMS current rating of at least 0.125A ≅
I_LOAD(MAX)/2 at temperature and C_OUT will require an ESR
of less than 0.5Ω. In most cases, a ceramic capacitor will
satisfy this requirement.
For the feedback resistors, choose R1 = 412k. R2 can
then be calculated from equation (2) to be:
R2 =
⎛⎝⎜
V_OUT
0.8
− 1^{⎞⎠⎟} R1=
875.5k;
use
887k
Figure 7 shows the complete circuit along with its effi-
ciency curve.
3405afa
12