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LT3837_15 Datasheet, PDF (12/28 Pages) Linear Technology – Isolated No-Opto Synchronous Flyback Controller
LT3837
OPERATION
R1
FB
8
R2 LOAD
COMP I
Q1 Q2
VFB
Q3
A1
VFLBK
T1
•
VIN •
•
MP
RCMPF
50k
SENSE+
12
14 RCMP
13 CCMP
RSENSE
3837 F01
Figure 1. Load Compensation Diagram
Figure 1 shows the block diagram of the load compensa-
tion function. Switch current is converted to voltage by the
external sense resistor, averaged and lowpass filtered by
the internal 50k resistor RCMPF and the external capacitor
on CCMP. This voltage is then impressed across the exter-
nal RCMP resistor by op amp A1 and transistor Q3. This
produces a current at the collector of Q3 that is subtracted
from the FB node. This action effectively increases the
voltage required at the top of the R1/R2 feedback divider
to achieve equilibrium.
The average primary side switch current increases to
maintain output voltage regulation as output loading
increases. The increase in average current increases
the RCMP resistor current which affects a corresponding
increase in sensed output voltage, compensating for the
IR drops.
Assuming a relatively fixed power supply efficiency, Eff,
power balance gives:
POUT = Eff • PIN
VOUT • IOUT = Eff • VIN • IIN
Average primary side current is expressed in terms of
output current as follows:
IIN = K1•IOUT
where :
K1=
VOUT
VIN •Eff
So the effective change in VOUT target is:
∆VOUT
= K1• ∆IOUT
• RSENSE
RCMP
• R1• NSF
thus :
∆VOUT
∆IOUT
=
K1•
RSENSE
RCMP
• R1• NSF
where:
K1 = dimensionless variable related to VIN, VOUT and
efficiency as explained above
RSENSE = external sense resistor
Nominal output impedance cancellation is obtained by
equating this expression with RS(OUT):
K1• RSENSE
RCMP
• R1• NSF
=
ESR +RDS(ON)
1– DC
Solving for RCMP gives:
RCMP
=
K1•
RSENSE •(1–DC)
ESR +RDS(ON)
• R1• NSF
The practical aspects of applying this equation to determine
an appropriate value for the RCMP resistor are found in the
Applications Information section.
3837fd
12