LTC3605_15 Datasheet, PDF (10/22 Pages) Linear Technology – 15V, 5A Synchronous Step-Down Regulator

LTC3605
Operation
Minimum Off-Time and Minimum On-Time
Considerations
The minimum off-time, t_OFF(MIN), is the smallest amount
of time that the LTC3605 is capable of turning on the bot-
tom power MOSFET, tripping the current comparator and
turning the power MOSFET back off. This time is generally
about 70ns. The minimum off-time limit imposes a maxi-
mum duty cycle of t_ON/(t_ON + t_OFF(MIN)). If the maximum
duty cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
minimum input voltage to avoid dropout is:
V_IN(MIN)
=
V_OUT
•
t_ON
+ t_OFF(MIN)
t_ON
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 40ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DC_MIN = f • t_ON(MIN)
where t_ON(MIN) is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is
surpassed, the output voltage will still remain in regula-
tion, but the switching frequency will decrease from its
programmed value. This is an acceptable result in many
applications, so this constraint may not be of critical
importance in most cases. High switching frequencies
may be used in the design without any fear of severe
consequences. As the sections on inductor and capacitor
selection show, high switching frequencies allow the use
of smaller board components, thus reducing the size of
the application circuit.
C_IN and C_OUT Selection
The input capacitance, C_IN, is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum R_MS current
should be used. The maximum R_MS current is given by:
I_RMS
≅
I_{OUT(MAX )}
V_OUT
V_IN
V_{IN – 1}
V_OUT
This formula has a maximum at V_IN = 2V_OUT, where
I_RMS ≅ I_OUT/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a
higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
The selection of C_OUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, DV_OUT, is
determined by:
DV_OUT
<
DI_L
⎛
⎜
⎝
8
•
f
1
• C_OUT
⎞
+ ESR⎟
⎠
The output ripple is highest at maximum input voltage
since DI_L increases with input voltage. Multiple capaci-
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements. Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints. Their relatively low value of bulk
capacitance may require multiples in parallel.
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