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RH1016 Datasheet, PDF (1/2 Pages) Linear Technology – UltraFast™ Precision 10ns Comparator
DICE/DWF SPECIFICATION
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8
RH1016
UltraFast™ Precision
10ns Comparator
PAD FUNCTION
DIE CROSS REFERENCE
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1
1. V+
LTC Finished
Order
7
2. +IN
Part Number
Part Number
2
3. –IN
4. V–
RH1016M
RH1016 DICE
5. LATCH ENABLE
RH1016M
RH1016 DWF*
6
6. GND
*DWF = DICE in wafer form.
3
7. Q OUT
8. Q OUT
4
5
56mils × 58mils
Backside Connection is V–
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
DICE ELECTRICAL TEST LIMITS
TA = 25°C. V+ = 5V, V– = –5V, VOUT(Q) = 1.4V, VLATCH = 0V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX UNITS
VOS
IOS
IB
CMRR
PSRR
AV
VOH
VOL
I+
I–
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
Common Mode Rejection
Supply Voltage Rejection
Small-Signal Voltage Gain
Output High Voltage
Output Low Voltage
Positive Supply Current
Negative Supply Current
RS ≤ 100Ω (Note 1)
(Note 1)
(Note 2)
(Note 3)
Single 5V Supply (Note 3)
–3.75V ≤ VCM ≤ 3.5V
Positive Supply 4.6V ≤ V+ ≤5.4V
Negative Supply –7V ≤ V– ≤ –2V
1V ≤ VOUT ≤ 2V
V+ ≥ 4.6V, IOUT = 1mA
IOUT = 10mA
ISINK = 4mA
–3.75
1.25
80
60
80
1400
2.80
2.60
±3
mV
1
μA
10
μA
3.5
V
3.5
V
dB
dB
dB
V/V
V
V
0.5
V
35
mA
5
mA
VIH
Latch Pin High Input Voltage
VIL
Latch Pin Low Input Voltage
IIL
Latch Pin Current
VLATCH = 0V
Note 1: Input offset voltage is defined as the average of the two voltages
measured by forcing first one output, then the other to 1.4V. Input offset
current is defined in the same way.
Note 2: Input bias current (IB) is defined as the average of the two input
currents.
2.0
V
0.8
V
500
μA
Note 3: Input voltage range is guaranteed in part by CMRR testing and
in part by design and characterization. See the LT1016 data sheet for
discussion of input voltage range for supplies other than ±5V or 5V.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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