LTM9001-AX_15 Datasheet, PDF (1/30 Pages) Linear Technology – 16-Bit IF/Baseband Receiver Subsystem

FEATURES
n _{Integrated 16-Bit, High-Speed ADC, Passive Filter}
and Fixed Gain Differential Amplifier
n _{Up to 300MHz IF Range}
Lowpass and Bandpass Filter Versions
n _{Low Noise, Low Distortion Amplifiers}
Fixed Gain: 8dB, 14dB, 20dB or 26dB
50Ω, 200Ω or 400Ω Input Impedance
n _{75dB SNR, 83dB SFDR (LTM9001-AD)}
n _{Integrated Bypass Capacitance, No External}
Components Required
n _{Optional Internal Dither}
n _{Optional Data Output Randomizer}
n _{LVDS or CMOS Outputs}
n _{3.3V Single Supply}
n _{Power Dissipation: 1.65W}
n _{Clock Duty Cycle Stabilizer}
n _{11.25mm × 11.25mm × 2.32mm LGA Package}
APPLICATIONS
n _{Telecommunications}
n _{High Sensitivity Receivers}
n _{Cellular Base Stations}
n _{Spectrum Analyzers}
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
LTM9001-Ax/LTM9001-Bx
16-Bit IF/Baseband
Receiver Subsystem
DESCRIPTION
The LTM^®9001 is an integrated system in a package (SiP)
that includes a high-speed 16-bit A/D converter, matching
network, anti-aliasing filter and a low noise, differential
amplifier with fixed gain. It is designed for digitizing wide
dynamic range signals with an intermediate frequency
(IF) range up to 300MHz. The amplifier allows either AC-
or DC-coupled input drive. A lowpass or bandpass filter
network can be implemented with various bandwidths.
Contact Linear Technology regarding semi-custom
configurations.
The LTM9001 is perfect for IF receivers in demanding
communications applications, with AC performance that
includes 72dBFS noise floor and 82dB spurious free
dynamic range (SFDR) at 162.5MHz (LTM9001-AA).
The digital outputs can be either differential LVDS or single-
ended CMOS. There are two format options for the CMOS
outputs: a single bus running at the full data rate or two
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.3V.
The differential ENC⁺ and ENC^– inputs may be driven with
a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional
clock duty cycle stabilizer allows high performance at full
speed with a wide range of clock duty cycles.
TYPICAL APPLICATION
Simplified IF Receiver Channel
V_CC
SENSE ^{VDD = 3.3V}
LTM9001
0V_DD = 0.5V TO 3.6V
RF
LO
IN^–
SAW
ANTI-ALIAS
FILTER
IN⁺
DIFFERENTIAL
FIXED GAIN
AMPLIFIER
GND
16-BIT
130Msps ADC
CLKOUT
OF
D15
•
CMOS
• OR
• _LVDS
D0
ENC⁺ ENC^–
ADC CONTROL PINS
9001 TA01
OGND
64k Point FFT, f_IN = 162.4MHz,
–1dBFS, PGA = 1
0
LTM9001-AA
–20
–40
–60
–80
HD3 HD2
–100
–120
0
10 20 30 40 50 60
FREQUENCY (MHz)
9001 TA01b
9001fc
1