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LTC1411_15 Datasheet, PDF (1/16 Pages) Linear Technology – Single Supply 14-Bit 2.5Msps ADC
FEATURES
s Sample Rate: 2.5Msps
s 80dB S/(N + D) and 90dB THD at 100kHz fIN
s Single 5V Operation
s No Pipeline Delay
s Programmable Input Ranges
s Low Power Dissipation: 195mW (Typ)
s True Differential Inputs Reject Common Mode Noise
s Out-of-Range Indicator
s Internal or External Reference
s Sleep (1µA) and Nap (2mA) Shutdown Modes
s 36-Pin SSOP Package
U
APPLICATIO S
s Telecommunications
s High Speed Data Acquisition
s Digital Signal Processing
s Multiplexed Data Acquisition Systems
s Spectrum Analysis
s Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTC1411
Single Supply
14-Bit 2.5Msps ADC
DESCRIPTIO
The LTC ®1411 is a 2.5Msps sampling 14-bit A/D con-
verter in a 36-pin SSOP package, which typically dissi-
pates only 195mW from a single 5V supply. This device
comes complete with a high bandwidth sample-and-
hold, a precision reference, programmable input ranges
and an internally trimmed clock. The ADC can be powered
down with either the Nap or Sleep mode for low power
applications.
The LTC1411 converts either differential or single-ended
inputs and presents data in 2’s complement format.
Maximum DC specs include ±2LSB INL and 14-bit no
missing code over temperature. Outstanding dynamic
performance includes 80dB S/(N + D) and 90dB THD at
100kHz input frequency.
The LTC1411 has four programmable input ranges se-
lected by two digital input pins, PGA0 and PGA1. This
provides input spans of ±1.8V, ±1.27V, ±0.9V and ±0.64V.
An out-of-the-range signal together with the D13 (MSB)
will indicate whether a signal is over or under the ADC’s
input range. A simple conversion start input and a data
ready signal ease connections to FIFOs, DSPs and micro-
processors.
BLOCK DIAGRA
1 AIN+
2 AIN–
REFOUT
3
REFIN
4
2.5V
BANDGAP
REFERENCE
5k
5k 2k
REFCOM1
5
REFCOM2
6
X1.62/
X1.15
10
30
AVP
DVP
+
14-BIT
– ADC
INTERNAL
CLOCK
14
OUTPUT
DRIVERS
CONTROL LOGIC
OVDD
29
OGND 28
D13
12
•
•
•
D0 25
BUSY
27
OTR
26
7, 8, 9
AGND
AVM SLP NAP PGA0 PGA1 CONVST DGND
11
36
35
34
33
32
31
1411 BD
S/(N + D) and Effective Bits
vs Input Frequency
86
14
80
13
74
12
68
11
62
10
56
50
44
38
32
26
20
14
10
100
1000
10000
INPUT FREQUENCY (kHz)
1411 TA02
1411f
1