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LTC3851A_15 Datasheet, PDF (16/30 Pages) Linear Technology – Synchronous Step-Down Switching Regulator Controller
LTC3851A
Applications Information
VMASTER
R3
TO
TK/SS
PIN
R4
VOUT
R3
TO
VFB
PIN
R4
VMASTER
R1
TO
TK/SS
PIN
R2
VOUT
R3
TO
VFB
PIN
R4
(4a) Coincident Tracking Setup
3851A F04
(4b) Ratiometric Tracking Setup
Figure 4. Setup for Coincident and Ratiometric Tracking
TK/SS
0.8V
VFB
I
I
+
D1 D2
EA
–
D3
3851A F05
Figure 5. Equivalent Input Circuit of Error Amplifier
mode, the TK/SS voltage is substantially higher than
0.8V at steady state and effectively turns off D1. D2 and
D3 will therefore conduct the same current and offer
tight matching between VFB and the internal precision
0.8V reference. In the ratiometric mode, however, TK/SS
equals 0.8V at steady state. D1 will divert part of the bias
current to make VFB slightly lower than 0.8V.
Although this error is minimized by the exponential I-V
characteristic of the diode, it does impose a finite amount
of output voltage deviation. Furthermore, when the master
supply’s output experiences dynamic excursion (under
load transient, for example), the slave channel output will
be affected as well. For better output regulation, use the
coincident tracking mode instead of ratiometric.
INTVCC Regulator
The LTC3851A features a PMOS low dropout linear regula­tor
(LDO) that supplies power to INTVCC from the VIN supply.
INTVCC powers the gate drivers and much of the LTC3851A ’s
internal circuitry. The LDO regulates the voltage at the
INTVCC pin to 5V.
The LDO can supply a peak current of 50mA and must
be bypassed to ground with a minimum of 2.2μF ceramic
capacitor or low ESR electrolytic capacitor. No matter
16
what type of bulk capacit­or is used, an additional 0.1μF
ceramic capacitor placed directly adjacent to the INTVCC
and GND pins is highly recommended. Good bypassing
is needed to supply the high transient currents required
by the MOSFET gate drivers.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi­
mum junction temperature rating for the LTC3851A to be
exceeded. The INTVCC current, which is dominated by the
gate charge current, is supplied by the 5V LDO.
Power dissipation for the IC in this case is highest and
is approximately equal to VIN • IINTVCC. The gate charge
current is dependent on operating frequency as discussed
in the Efficiency Considerations section. The junction tem-
perature can be estimated by using the equa­tions given in
Note 3 of the Electrical Characteristics. For example, the
LTC3851A INTVCC current is limited to less than 14mA
from a 36V supply in the GN package:
TJ = 70°C + (14mA)(36V)(110°C/W) = 125°C
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous conduction mode (MODE/PLLIN
= INTVCC) at maximum VIN.
Topside MOSFET Driver Supply (CB, DB)
An external bootstrap capacitor, CB, connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. Capacitor CB in the Functional Diagram is charged
though external diode DB from INTVCC when the SW pin
is low. When the topside MOSFET is to be turned on, the
driver places the CB voltage across the gate source of the
MOSFET. This enhances the MOSFET and turns on the
topside switch. The switch node voltage, SW, rises to VIN
3851afa