LTC3808 Datasheet, PDF (8/28 Pages) Linear Technology – No RSENSE TM, Low EMI, Synchronous DC/DC Controller with Output Tracking

LTC3808
PI FU CTIO S (DFN/SSOP)
SENSE^– (Pin 13/Pin 15): Negative Input to Differential
Current Comparator. Normally is connected to the SW pin
when the sense resistor is not used. When using a current
sense resistor, connect the resistor between SENSE⁺ and
SENSE^– and connect the source of the P-channel MOSFET
to the SENSE^– pin.
SW (Pin 14/Pin 16): Switch Node Connection to Inductor.
This pin is also an input to the reverse current comparator.
Normally this pin is connected to the drain of the external
P-channel MOSFET, the drain of the external N-channel
MOSFET and the inductor.
GND (Pin 15/Pins 1, 9): Ground connection for internal
circuits, the gate drivers and the negative input to the
reverse current comparator. The exposed pad (Pin 15 in
DFN package) must be soldered to the PCB ground.
W
FU CTIO AL DIAGRA
V_IN
C_IN
V_IN
VOLTAGE
V_REF
REFERENCE
0.6V
UNDERVOLTAGE
LOCKOUT
V_IN
V_IN
0.7µA
RUN
t = 1ms
INTERNAL
SOFT-START
SENSE^–
SLOPE
I_PRG
+
SENSE⁺
ICMP
–
UVSD
V_IN
0.15V
1µA _MUX
TRACK/SS
TRK/SS
0.3V
SYNC/MODE ^{BURST DEFEAT}
CLOCK DETECT
0.4V
BURSTDIS
FCB
PHASE
DETECTOR
2.6µA
PLLLPF
V_IN
PGOOD
GND
V_CO
CLK
OV
UV
UVSD
CLK S
Q
R
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
SENSE⁺
PV_IN
TG
GND
ANTI-SHOOT-
THROUGH
PV_IN
SW
BG
+
FCB
SLEEP
–
OV
I_REV
BURSTDIS
GND
0.68V
MP
L
C_OUT
MN
V_OUT
R_B
UV
I_REV
0.54V
EAMP
V_FB
I_TH
R_C
V_REF
0.6V
C_C
TRK/SS
V_FB
SW
RICMP
GND
R_A
3808 FD
3808f
8