JPAD Datasheet, PDF (2/2 Pages) Linear Integrated Systems – PICO AMPERE DIODES

Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by JPADs D₁ and D₂. Common
Mode Input voltage limited by JPADs D₃ and D₄ to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset
voltages fed capacitively from the JFET switch gate.
FIGURE 1
FIGURE 2
JPAD20
-
D1
D2 OP-27
+
D3
D4
+15V -15V
e_{in CONTROL}
SIGNAL
+V -V
JPAD5
D1
D2
2N4393
C
+V
2N4117A
R
V_OUT
TO-72
Three Lead
0.195 _DIA.
0.175
0.030
MAX.
0.230 _DIA.
0.209
0.150
0.115
TO-92
SOT-23
0.175
0.195
0.170
LS XXX
0.195
YYWW
0.130
0.155
0.89
1.03
0.045
1
0.060
1.78
2.05
2
0.37
0.51
3
2.80
3.04
3 LEADS
0.019 DIA.
0.016
0.100
0.500 MIN.
0.050
45°
0.046
0.036
1
2
3
0.048
0.028
0.500
0.610
0.016
0.022
0.014
0.020
1
2
0.095
0.105
DIMENSIONS
IN INCHES.
1.20
1.40
0.89
2.10
1.12
2.64
0.085
0.180
0.013
0.100
0.55
DIMENSIONS IN
MILLIMETERS
1. Absolute maximum ratings are limiting values above which serviceability may be impaired.
2. The PAD type number denotes its maximum reverse current value in pico amperes. Devices with I_R values intermediate to those shown
are available upon request.
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