ID100 Datasheet, PDF (2/2 Pages) Microsemi Corporation – SCRs .5 Amp, Planar

Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by Diodes ID100 D₁ and D₂.
Common Mode Input voltage limited by Diodes ID100 D₃ and D₄ to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. ID100 diodes reduce offset
voltages fed capacitively from the ID100 switch gate.
FIGURE 1
FIGURE 2
ID100
-
D1
D2 OP-27
+
D3
D4
+15V -15V
e_{in CONTROL}
SIGNAL
+V -V
ID100
D1
D2
2N4393
C
+V
2N4117A
R
V_OUT
TO-78
0.016
0.019
DIM. A
0.335
0.370
0.305
0.335
MAX.
0.040 0.165
0.185
MIN. 0.500
0.016
0.021
DIM. B
0.029
0.045
0.200
SEATING
PLANE
0.100
23
1
5
76
0.100
45°
0.028
0.034
TO-71
Six Lead
0.195 _DIA.
0.175
0.030
MAX.
0.230 _DIA.
0.209
0.150
0.115
6 LEADS
0.019 DIA.
0.016
0.500 MIN.
0.100
0.050
23
1
5
6
45°
7
0.046
0.036
0.048
0.028
1. Absolute maximum ratings are limiting values above which serviceability may be impaired.
2. Design reference only, not 100% tested.
3. Pins 3 & 5 on ID100 and ID101 must not be connected, in any fashion or manner, to any circuit or node.
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