DPAD Datasheet, PDF (2/2 Pages) Linear Integrated Systems – MONOLITHIC DUAL PICO AMPERE DIODES

Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by DPADs D₁ and D₂. Common
Mode Input voltage limited by DPADs D₃ and D₄ to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. DPAD diodes reduce offset
voltages fed capacitively from the JFET switch gate.
FIGURE 1
DPAD10
-
D1
D2 OP-27
+
D3
D4
+15V -15V
FIGURE 2
+V -V
DPAD1
D1
D2
e_{in CONTROL}
SIGNAL
2N4393
C
+V
2N4117A
R
V_OUT
TO-72
Four Lead
0.195 _DIA.
0.175
0.030
MAX.
0.230 _DIA.
0.209
0.150
0.115
4 LEADS
0.019 DIA.
0.016
0.500 MIN.
0.100
0.050
2
1
3
45°
4
TO-78
0.016
0.019
DIM. A
0.335
0.370
0.305
0.335
MAX.
0.040 0.165
0.185
MIN. 0.500
0.016
0.021
DIM. B
0.029
0.045
0.200
SEATING
PLANE
0.100
34
1
5
7
0.100
45°
0.046
0.036
0.048
0.028
0.028
0.034
0.014
0.018
0.021
0.150
0.157
0.0075
0.0098
SOIC
1
8
0.050
2
7
0.189
3
6
0.196
4
5
0.2284
0.2440
DIMENSIONS IN
INCHES
0.0040
0.0098
1. Absolute maximum ratings are limiting values above which serviceability may be impaired.
2. The DPAD type number denotes its maximum reverse current value in pico amperes. Devices with I_R values intermediate to those
shown are available upon request.
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