APXK004A0X-SRZ_10 Datasheet, PDF (17/25 Pages) Lineage Power Corporation – 16V Pico TLynxTM 4A: Non-Isolated DC-DC Power Modules

Data Sheet
September 13, 2010
16V Pico TLynx^TM 4A: Non-isolated DC-DC Power Modules
8 – 16Vdc input; 0.6Vdc to 8.0Vdc output; 4A output current
Voltage Margining
Output voltage margining can be implemented in the
16V Pico TLynx^TM 4A modules by connecting a
resistor, R_margin-up, from the Trim pin to the ground pin
for margining-up the output voltage and by connecting
a resistor, R_margin-down, from the Trim pin to output pin
for margining-down. Figure 10 shows the circuit
configuration for output voltage margining. The POL
Programming Tool, available at
www.lineagepower.com under the Design Tools
section, also calculates the values of R_margin-up and
R_margin-down for a specific output voltage and % margin.
Please consult your local Lineage Power technical
representative for additional details.
Vo
Rmargin-down
MODULE
Q2
Trim
Rmargin-up
Rtrim
Q1
GND
Figure 58. Circuit Configuration for margining
Output voltage.
Monotonic Start-up and Shutdown
The 16V Pico TLynx^TM 4A modules have monotonic
start-up and shutdown behavior for any combination
of rated input voltage, output current and operating
temperature range.
Startup into Pre-biased Output
The 16V Pico TLynx^TM 4A modules can start into a
prebiased output as long as the prebias voltage is
0.5V less than the set output voltage. Note that
prebias operation is not supported when output
voltage sequencing is used.
Power Good
The 16V Pico TLynx^TM 4A modules provide a Power
Good (PGOOD) signal that is implemented with an
open-drain output to indicate that the output voltage is
within the regulation limits of the power module. The
PGOOD signal will be de-asserted to a low state if
any condition such as overtemperature, overcurrent
or loss of regulation occurs that would result in the
output voltage going ±10% outside the setpoint value.
The PGOOD terminal should be connected through a
pullup resistor (suggested value 100KΩ) to a source
of 5VDC or lower.
Tunable Loop^TM
The 16V Pico TLynx^TM 4A modules have a new
feature that optimizes transient response of the
module called Tunable Loop^TM.
External capacitors are usually added to the output of
the module for two reasons: to reduce output ripple
and noise (see Fig. 53) and to reduce output voltage
deviations from the steady-state value in the presence
of dynamic load current changes. Adding external
capacitance however affects the voltage control loop
of the module, typically causing the loop to slow down
with sluggish response. Larger values of external
capacitance could also cause the module to become
unstable.
The Tunable Loop^TM allows the user to externally
adjust the voltage control loop to match the filter
network connected to the output of the module. The
Tunable Loop^TM is implemented by connecting a
series R-C between the SENSE and TRIM pins of the
module, as shown in Fig. 59. This R-C allows the user
to externally adjust the voltage loop feedback
compensation of the module.
VOUT
SENSE
MODULE
TRIM
GND
RTUNE
CO
CTUNE
RTrim
Figure. 59. Circuit diagram showing connection of
R_TUME and C_TUNE to tune the control loop of the
module.
Recommended values of R_TUNE and C_TUNE for different
output capacitor combinations are given in Tables 2
and 3. Table 2 shows the recommended values of
R_TUNE and C_TUNE for different values of ceramic output
capacitors up to 470μF that might be needed for an
application to meet output ripple and noise
requirements. Selecting R_TUNE and C_TUNE according to
Table 2 will ensure stable operation of the module.
In applications with tight output voltage limits in the
presence of dynamic current loading, additional
output capacitance will be required. Table 3 lists
recommended values of R_TUNE and C_TUNE in order to
meet 2% output voltage deviation limits for some
LINEAGE POWER
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