5962-8983902RA Datasheet, PDF (5/8 Pages) Lattice Semiconductor – High Performance E2CMOS PLD Generic Array Logic™

Specifications GAL16V8D/883
AC Switching Characteristics
Over Recommended Operating Conditions
PARAMETER
TEST
COND¹.
DESCRIPTION
tpd
A Input or I/O to Combinational Output
tco
A Clock to Output Delay
tcf²
— Clock to Feedback Delay
tsu
— Setup Time, Input or Feedback before Clock↑
th
— Hold Time, Input or Feedback after Clock↑
A Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
-15
-20
-30
UNITS
MIN. MAX. MIN. MAX. MIN. MAX.
3 15 3 20 3 30 ns
2 12 2 15 2 20 ns
— 12 — 15 — 20 ns
12 — 15 — 25 — ns
0 — 0 — 0 — ns
41.6 — 33.3 — 22.2 — MHz
fmax³
A Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
41.6 — 33.3 — 22.2 — MHz
A Maximum Clock Frequency with
No Feedback
50 — 41.6 — 33.3 — MHz
twh
— Clock Pulse Duration, High
twl
— Clock Pulse Duration, Low
ten
B Input or I/O to Output Enabled
B OE to Output Enabled
10 — 12 — 15 — ns
10 — 12 — 15 — ns
— 15 — 20 — 30 ns
— 15 — 18 — 25 ns
tdis
C Input or I/O to Output Disabled
C OE to Output Disabled
— 15 — 20 — 30 ns
— 15 — 18 — 25 ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section.
Capacitance (T_A = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
C_I
Input Capacitance
C_I/O
I/O Capacitance
*Characterized but not 100% tested.
MAXIMUM*
10
10
UNITS
pF
pF
TEST CONDITIONS
V_CC = 5.0V, V_I = 2.0V
V_CC = 5.0V, V_I/O = 2.0V
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