OR4 Datasheet, PDF (126/152 Pages) Lattice Semiconductor – ORCASeries 4 FPGAs

ORCA Series 4 FPGAs
Data Sheet
May, 2006
680-Pin PBGAM Pinout
Table 69. 680-Pin PBGAM Pinout
BM680
VDDIO
Bank
VREF
Group
A1
—
—
F5
—
—
E4
—
—
E3
—
—
D2
—
—
G5
—
—
D3 0 (TL) —
D1 0 (TL) 7
F4 0 (TL) 7
A2
—
—
F3 0 (TL) 7
G4 0 (TL) 7
E2 0 (TL) 7
H5 0 (TL) 7
E5 0 (TL) —
E1 0 (TL) 8
F2 0 (TL) 8
J5 0 (TL) 8
F1 0 (TL) 8
A18 —
—
H4 0 (TL) 8
G3 0 (TL) 8
H3 0 (TL) 9
G2 0 (TL) 9
K5 0 (TL) 9
G1 0 (TL) 9
J4 0 (TL) 9
L5 0 (TL) 9
A33 —
—
J3 0 (TL) 10
H2 0 (TL) 10
H1 0 (TL) 10
J2 0 (TL) 10
J1 0 (TL) 10
K3 0 (TL) 10
L4 7 (CL) 1
K2 7 (CL) 1
L1 7 (CL) —
K1 7 (CL) 1
L2 7 (CL) 1
L3 7 (CL) 1
N5 7 (CL) 1
126
I/O
Vss
VDD33
O
I
I
I
VDDIO0
IO
IO
Vss
IO
IO
IO
IO
VDDIO0
IO
IO
IO
IO
Vss
IO
IO
IO
IO
IO
IO
IO
IO
Vss
IO
IO
IO
IO
IO
IO
IO
IO
VDDIO7
IO
IO
IO
IO
OR4E02
OR4E04
OR4E06
Additional
Function
Pair
Vss
Vss
Vss
—
VDD33
VDD33
VDD33
—
PRD_DATA PRD_DATA PRD_DATA RD_DATA/TDO
PRESET_N PRESET_N PRESET_N
RESET_N
PRD_CFG_ PRD_CFG_ PRD_CFG_
N
N
N
RD_CFG_N
PPRGRM_N PPRGRM_N PPRGRM_N PRGRM_N
VDDIO0
VDDIO0
VDDIO0
—
PL2D
PL2D
PL2D
PLL_CK0C/HPPLL
PL2C
PL2C
PL2C PLL_CK0T/HPPLL
Vss
Vss
Vss
—
PL2B
PL3D
PL3D
—
PL2A
PL3C
PL3C
VREF_0_07
PL3D
PL4D
PL4D
D5
PL3C
PL4C
PL4C
D6
VDDIO0
VDDIO0
VDDIO0
—
PL3B
PL4B
PL5D
—
PL3A
PL4A
PL5C
VREF_0_08
PL4D
PL5D
PL6D
HDC
PL4C
PL5C
PL6C
LDC_N
Vss
Vss
Vss
—
PL4B
PL5B
PL7D
—
PL4A
PL5A
PL7C
—
PL5D
PL6D
PL8D
TESTCFG
PL5C
PL6C
PL8C
D7
PL5B
PL7D
PL9D
VREF_0_09
PL5A
PL7C
PL9C
A17/PPC_A31
PL6D
PL8D
PL10D
CS0_N
PL6C
PL8C
PL10C
CS1
Vss
Vss
Vss
—
PL6B
PL9D
PL11D
—
PL6A
PL9C
PL11C
—
PL7D
PL10D
PL12D
INIT_N
PL7C
PL10C
PL12C
DOUT
PL7B
PL11D
PL13D
VREF_0_10
PL7A
PL11C
PL13C
A16/PPC_A30
PL8D
PL12D
PL14D
A15/PPC_A29
PL8C
PL12C
PL14C
A14/PPC_A28
VDDIO7
VDDIO7
VDDIO7
—
PL8B
PL12B
PL15D
—
PL8A
PL12A
PL15C
—
PL9D
PL13D
PL16D
VREF_7_01
PL9C
PL13C
PL16C
D4
—
—
—
—
—
—
—
L21C_D2
L21T_D2
—
L22C_D0
L22T_D0
L23C_D2
L23T_D2
—
L24C_D0
L24T_D0
L25C_D3
L25T_D3
—
L26C_D0
L26T_D0
L27C_D0
L27T_D0
L28C_D3
L28T_D3
L29C_D1
L29T_D1
—
L30C_D0
L30T_D0
L31C_D0
L31T_D0
L32C_D1
L32T_D1
L1C_D1
L1T_D1
—
L2C_D0
L2T_D0
L3C_D1
L3T_D1
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