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KK74ACT240 Datasheet, PDF (4/5 Pages) KODENSHI KOREA CORP. – Octal 3-State Inverting Buffer/Line Driver/Line Receiver High-Speed Silicon-Gate CMOS
KK74ACT240
AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)
Symbol
Parameter
tPLH Propagation Delay, A to YA or B to YB
(Figure 1)
tPHL Propagation Delay, A to YA or B to YB
(Figure 1)
tPZH Propagation Delay, Output Enable to YA or YB
(Figure 2)
tPZL Propagation Delay, Output Enable to YA or YB
(Figure 2)
tPHZ Propagation Delay, Output Enable to YA or YB
(Figure 2)
tPLZ Propagation Delay, Output Enable to YA or YB
(Figure 2)
CIN Maximum Input Capacitance
Guaranteed Limits
25 °C
-40°C to
Unit
85°C
Min Max Min Max
1.5 8.5 1.5 9.5
ns
1.5 7.5 1.5 8.5
ns
1.5 8.5 1.0 9.5
ns
2.0 9.5 1.5 10.5
ns
2.0 9.5 2.0 10.5
ns
2.5 10.0 2.0 10.5
ns
4.5
4.5
pF
CPD Power Dissipation Capacitance
Typical @25°C,VCC=5.0 V
45
pF
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
4