IRFR4105TRL Datasheet, PDF (5/10 Pages) Kersemi Electronic Co., Ltd. – Advanced Planar Technology

AUIRFR4105
1200
1000
800
600
V_GS = 0V,
f = 1MHz
C_iss = C_gs + C_gd , C_ds SHORTED
C_rss = C_gd
Ciss Coss = Cds + Cgd
Coss
400
Crss
200
0
A
1
10
100
V_DS , Drain-to-Source Voltage (V)
20
I_D = 16A
16
V_DS = 44V
V_DS = 28V
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
0
10
20
30
40
Q_G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
T_J = 175°C
T_J = 25°C
10
1
VGS = 0V _A
0.4
0.8
1.2
1.6
2.0
V_SD , Source-to-Drain Voltage (V)
100
10μs
100μs
10
1ms
T_C = 25°C
T_J = 175°C
Single Pulse
1
1
10
V_DS , Drain-to-Source Voltage (V)
A
100
Fig 7. Typical Source-Drain Diode
Forward Voltage
www.kersemi.com
Fig 8. Maximum Safe Operating Area
5