EV6R11 Datasheet, PDF (5/7 Pages) IXYS Corporation – IX6R11 HALF BRIDGE DRIVER Evaluation Board

EV6R11 KIT
OPERATION:
For performance evaluation and power
system design please note the following:
a) The assembled board can be run with the
IXDP630 removed by applying complemen-
tary 5V square waves with proper "dead time"
to the input pins HIN (P1-2) and LIN (P1-3).
For standard IXDP630 operation, the
values of R3 and C5 have been listed on the
bill of materials. These values are for demon-
stration, which may not be appropriate for your
application and can be changed as needed.
For IXDP631 operation, load R3, C5, C6 with
the recommended load components as out-
lined in the IXDP630/631 data sheet along
with the crystal at the frequency of choice. R3
and C5 serve a dual purpose depending on
which dead timer is used.
The IXDP630 is hardwired for phase 'R'
operation, see 630/631 data sheet, with pins
OUTENA, ENAR, and RESET tied high.
PWM drive input signal for ' R' phase is ap-
plied to P1-6.
To add phases 'S' and/or 'T', enable
phases with jumpers at JP1 and/or JP2 and
apply PWM phase drive signals to TP5 and/or
TP6 taking the respective complementary
outputs from TP1 through TP4. Note that TP1-
TP6 are through-hole pads that have been
added to the board to serve as convenient
solder and/or test points.
b) The IX6R11 provides a wide range of
flexibility with its power supply requirements.
However, threshold levels must be observed
in the relationship between Vdd to HIN and
LIN when selecting power supply values in
the final design. Device propagation delays
can also be minimized by observing relative
values between supplies.
c) Be careful with ground connections. Avoid
ground loops. In general, connect the grounds
as shown in Figure 4 to minimize ground
bounce effects. This is particularly important
when three "High/Low side driver design kits"
are connected together with a single IXDP630
to form a three phase drive system, such as
that shown in Figure 5.
d) Before using the PCB at full power or at-
tempting a short circuit test, make sure that a
proper high voltage electrolytic capacitor is
connected between DC BUS and GND as
shown in Figure 4. The leads to this capacitor
should be as short as possible to minimize
any stray inductance.
e) Figure 4 shows the load terminated at point
A. This point could be connected to a number
of places depending on the application. For
example: Connection to ground will test the
high side device. Connection to DC BUS will
test the low side device. It could also be con-
nected to the center point of a capacitive
divider (UPS systems).
f) Figure 5 shows a three phase power system
implementation with a load configured in a Y
(star). It could also be configured in a DELTA
configuration. Please note the grounding
scheme. Cut the connection between "ground
plane 2" and "ground plane 4" on the compo-
nents side of the PCB and solder a 10 Ohm
resistor between these ground planes. The
GND of each board is terminated to a single
ground point.
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