CPC7692 Datasheet, PDF (16/18 Pages) IXYS Corporation – Drop-in replacement for CPC7592

INTEGRATED CIRCUITS DIVISION
CPC7692
negative than the voltage source at V_BAT, the SCR
conducts and faults are shunted to F_GND via the SCR
or the diode bridge.
In order for the SCR to crowbar (or foldback), the
SCR’s on-voltage (see “Protection Circuitry
Electrical Specifications” on page 9) must be less
than the applied voltage at the V_BAT pin. If the V_BAT
voltage is less negative than the SCR on-voltage or if
the V_BAT supply is unable to source the trigger current,
the SCR will not crowbar.
For power induction or power-cross fault conditions,
the positive cycle of the transient is clamped to a diode
drop above ground and the fault current directed to
ground. The negative cycle of the transient will cause
the SCR to conduct when the voltage exceeds the
V_BAT reference voltage by two to four volts, steering
the fault current to ground.
Note: The CPC7692BB does not contain the
protection SCR but instead uses diodes to clamp both
polarities of a transient fault. These diodes direct the
negative potential’s fault current to the V_BAT pin.
2.9.2 Current Limiting function
If a lightning strike transient occurs when the device is
in the talk state, the current is passed along the line to
the integrated protection circuitry and restricted by the
High Frequency Dynamic Current Limit response of
the active switches. During the talk state, when a
1000V 10x1000 s lightning pulse (GR-1089-CORE)
is applied to the line though a properly clamped
external protector, the current seen at T_LINE and R_LINE
will be a pulse with a typical magnitude of 2.5 A and a
duration less than 0.5 s.
If a power-cross fault occurs with the device in the talk
state, the current passes though the break switches
SW1 and SW2 to the integrated protection circuit but
is limited by the Low Frequency Current Limit
response of the two break switches. The Low
Frequency Current Limit specified over temperature is
between 80 mA and 425 mA with the circuitry having a
negative temperature coefficient. As a result, if the
device is subjected to extended heating due to a
power cross fault condition, the measured current at
T_LINE and R_LINE will decrease as the device
temperature increases. If the device temperature rises
sufficiently, the thermal shutdown mechanism will
activate and the device will enter the all-off state.
2.10 Thermal Shutdown
The thermal shutdown mechanism activates when the
device die temperature reaches a minimum of 110 C,
placing the device in the all-off state regardless of
logic input. During thermal shutdown events the T_SD
pin will output a logic low with a nominal 0V level. A
logic high is output from the T_SD pin during normal
operation with a typical output level equal to V_DD. As
stated earlier, the thermal shutdown feature can not
be disabled by forcing a logic high to the T_SD input.
If presented with a short duration transient such as a
lightning event, the thermal shutdown feature will
typically not activate. But in an extended power-cross
event, the device temperature will rise and the thermal
shutdown mechanism will activate forcing the switches
to the all-off state. At this point the current measured
into T_LINE or R_LINE will drop to zero. Once the device
enters thermal shutdown it will remain in the all-off
state until the temperature of the device drops below
the de-activation level of the thermal shutdown circuit.
This permits the device to autonomously return to
normal operation. If the fault has not passed, current
will again flow up to the value allowed by the current
limiting of the switches and heating will resume,
reactivating the thermal shutdown mechanism. This
cycle of entering and exiting the thermal shutdown
mode will continue as long as the fault condition
persists. If the magnitude of the fault condition is great
enough, the external secondary protector will activate
shunting the fault current to ground.
2.11 External Protection Elements
The CPC7692 requires only over voltage secondary
protection on the loop side of the device. The
integrated protection feature described above negates
the need for additional external protection on the SLIC
side. The secondary protector must limit voltage
transients to levels that do not exceed the breakdown
voltage or input-output isolation barrier of the
CPC7692. A foldback or crowbar type protector is
recommended to minimize stresses on the CPC7692.
Consult IXYS IC Division’s application note, AN-100,
Designing Surge and Power Fault Protection Circuits for
Solid State Subscriber Line Interfaces for equations
related to the specifications of external secondary
protectors, fused resistors and PTCs.
16
www.ixysic.com
R01