CPC7583 Datasheet, PDF (16/19 Pages) Clare, Inc. – Line Card Access Switch

INTEGRATED CIRCUITS DIVISION
CPC7583
2.4 Data Latch
The CPC7583 has an integrated data latch. The latch
operation is controlled by logic-level input at the
LATCH pin. The data input of the latch are the input
pins, while the output of the data latch is an internal
node used for state control. When the LATCH control
pin is at logic 0, the data latch is transparent and data
control signals flow directly through to state control. A
change in input will be reflected by a change in switch
state. When the LATCH control pin is at logic 1, the
data latch is active and a change in input control will
not affect switch state. The switches will remain in the
position they were in when the LATCH changed from
logic 0 to logic 1 and will not respond to changes in
input as long as the latch is at logic 1. The T_SD input is
not tied to the data latch. Therefore, T_SD is not
affected by the LATCH input and the T_SD input will
override state control.
2.5 T_SD Behavior
Setting T_SD to +5V allows switch control using the
logic inputs. This setting, however, also disables the
thermal shutdown circuit and is therefore not
recommended. When using logic control via the input
pins, T_SD should be allowed to float. As a result, the
two recommended states when using T_SD as a control
are 0, which forces the device to an all-off state, or
float, which allows logic inputs to remain active. This
requires the use of an open-collector type buffer.
2.6 Ringing Switch Zero-Cross Current Turn Off
After the application of a logic input to turn SW4 off,
the ringing switch is designed to delay the change in
state until the next zero-crossing. Once on, the switch
requires a zero-current cross to turn off, and therefore
should not be used to switch a pure DC signal. The
switch will remain in the on state no matter the logic
input until the next zero crossing. These switching
characteristics will reduce and possibly eliminate
overall system impulse noise normally associated with
ringing switches. See IXYS Integrated Circuits
Division’s application note AN-144, Impulse Noise
Benefits of Line Card Access Switches for more
information. The attributes of ringing switch SW4 may
make it possible to eliminate the need for a zero-cross
switching scheme. A minimum impedance of 300 in
series with the ringing generator is recommended.
2.7 Power Supplies
Both a +5 V supply and battery voltage are connected
to the CPC7583. Switch state control is powered
exclusively by the +5 V supply. As a result, the
CPC7583 exhibits extremely low power consumption
during both active and idle states.
The battery voltage is not used for switch control but
rather as a supply for the integrated secondary
protection circuitry. The integrated SCR is designed to
trigger when the voltage at T_BAT or R_BAT drops 2 to
4 V below the applied voltage on the V_BAT pin. This
trigger prevents a fault induced overvoltage event at
the T_BAT or R_BAT nodes.
2.8 Battery Voltage Monitor
The CPC7583 also uses the V_BAT voltage to monitor
battery voltage. If battery voltage is lost, the CPC7583
immediately enters the all-off state. It remains in this
state until the battery voltage is restored. The device
also enters the all-off state if the system battery
voltage goes more positive than –10 V, and remains in
the all-off state until the battery voltage goes more
negative than –15 V. This battery monitor feature
draws a small current from the battery (less than 1 A
typical) and will add slightly to the device’s overall
power dissipation.
2.9 Protection
2.9.1 Diode Bridge/SCR
The CPC7583 uses a combination of current limited
break switches, a diode bridge/SCR clamping circuit,
and a thermal shutdown mechanism to protect the
SLIC device or other associated circuitry from damage
during line transient events such as lightning. During a
positive transient condition, the fault current is
conducted through the diode bridge to ground via
F_GND. Voltage is clamped to a diode drop above
ground. During a negative transient of 2V to 4V more
negative than the voltage source at V_BAT, the SCR
conducts and faults are shunted to F_GND via the SCR
or the diode bridge.
In order for the SCR to crowbar or foldback, the on
voltage (see “Protection Circuitry Electrical
Specifications” on page 12) of the SCR must be less
negative than the V_BAT voltage. If the V_BAT voltage is
less negative than the SCR on voltage, or if the V_BAT
supply is unable to source the trigger current, the SCR
will not crowbar.
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