IS62WV1288DALL Datasheet, PDF (8/16 Pages) Integrated Silicon Solution, Inc – 128K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV1288DALL/DBLL
IS65WV1288DALL/DBLL
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = Vil, CS2 = WE = Vih)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2^(1,3) (CS1, CS2,OE Controlled)
ADDRESS
OE
CS1
CS2
DOUT
tRC
tAA
tDOE
tLZOE
tACS1/tACS2
tLZCS1/
tLZCS2
HIGH-Z
tOHA
tHZOE
tHZCS
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1= Vil. CS2=WE=Vih.
3. Address is valid prior to or coincident with CS1 LOW and CS2 HIGH transition.
8
Integrated Silicon Solution, Inc. — www.issi.com
Rev.  B
12/01/2010