IS62WV10248DALL Datasheet, PDF (8/15 Pages) Integrated Silicon Solution, Inc – TTL compatible interface levels

IS62WV10248DALL/BLL, IS65WV10248DALL/BLL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
45 ns
55 ns
70 ns
Min. Max.
Min. Max.
Min. Max.
Unit
trc
Read Cycle Time
45
—
55
—
70
—
ns
taa
Address Access Time
—
45
—
55
—
70
ns
toha
Output Hold Time
10
—
10
—
10
—
ns
tacs1/tacs2
CS1/CS2 Access Time
—
45
—
55
—
70
ns
tdoe
OE Access Time
—
20
—
25
—
35
ns
thzoe⁽²⁾
OE to High-Z Output
—
15
—
20
—
25
ns
tlzoe⁽²⁾
OE to Low-Z Output
5
—
5
—
5
—
ns
t t hzcs1/ hzcs2⁽²⁾ CS1/CS2 to High-Z Output
0
15
0
20
0
25
ns
t t lzcs1/ lzcs2⁽²⁾ CS1/CS2 to Low-Z Output
10
—
10
—
10
—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
Vdd-0.2V/0.4V to Vdd-0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = Vil, CS2 = WE = Vih)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.  A
05/11/09