IS61LV2568 Datasheet, PDF (4/8 Pages) Integrated Silicon Solution, Inc – 256K x 8 HIGH-SPEED CMOS STATIC RAM

IS61LV2568
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol Parameter
tRC Read Cycle Time
tAA Address Access Time
tOHA Output Hold Time
tACE CE Access Time
tDOE OE Access Time
tLZOE⁽²⁾ OE to Low-Z Output
tHZOE⁽²⁾ OE to High-Z Output
tLZCE⁽²⁾ CE to Low-Z Output
tHZCE⁽²⁾ CE to High-Z Output
- 8 ns
-10 ns
-12 ns
-15 ns
Min. Max Min. Max. Min. Max.
Min. Max.
Unit
8—
10 —
12
—
15
—
ns
—8
— 10
—
12
—
15
ns
3—
3—
3
—
3
—
ns
—8
— 10
—
12
—
15
ns
—3
—4
—
5
—
6
ns
0—
0—
0
—
0
—
ns
03
04
0
5
0
6
ns
3—
3—
3
—
3
—
ns
03
04
0
5
0
6
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
3.3V
319 Ω
OUTPUT
30 pF
Including
jig and
scope
Figure 1
353 Ω
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2
353 Ω
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00