IS62WV2568EALL Datasheet, PDF (3/16 Pages) Integrated Silicon Solution, Inc – Three state outputs

IS62/65WV2568EALL
IS62/65WV2568EBLL
FUNCTION DESCRIPTION
SRAM is one of random access memories. SRAM has three different modes supported. Each function is described
below with Truth Table.
STANDBY MODE
Device enters standby mode when deselected (
HIGH or CS2 LOW ). The input and output pins (I/O0-7) are
placed in a high impedance state. CMOS input in this mode will maximize saving power.
WRITE MODE
Write operation issues with Chip selected (
LOW and CS2 HIGH) and Write Enable ( ) input LOW. The input
and output pins(I/O0-7) are in data input mode. Output buffers are closed during this time even if is LOW.
READ MODE
Read operation issues with Chip selected (
LOW and CS2 HIGH) and Write Enable ( ) input HIGH. When
is LOW, output buffer turns on to make data output. Any input to I/O pins during READ mode is not permitted.
In the READ mode, output buffers can be turned off by pulling HIGH. In this mode, internal device operates as
READ but I/Os are in a high impedance state. Since device is in READ mode, active current is used.
TRUTH TABLE
Mode
CS2
Not Selected
H
X
X
X
L
X
Output Disabled L
H
H
Write
L
H
H
Read
L
H
L
I/O0-I/O7 VDD Current
X
High-Z
ISB1,ISB2
X
High-Z
H
High-Z
ICC
L
DIN
ICC
X
DOUT
ICC
Integrated Silicon Solution, Inc.- www.issi.com
3
Rev. 0A
09/26/2014