IS24C32C Datasheet, PDF (15/20 Pages) Integrated Silicon Solution, Inc – 32K-bit 2-WIRE SERIAL CMOS EEPROM

IS24C32C
Dual Flat No-Lead
Package Code: D (8-pad)
A
D2
b
(8X)
D
Pad 1 index area
DFN
MILLIMETERS
Sym. Min. Nom. Max.
N0.
Pad
8
D
2.00 BSC
E
3.00 BSC
D2
1.50 — 1.75
E2
1.60 — 1.90
A
0.70 0.75 0.80
A1
0.0 0.02 0.05
A2
— — 0.75
A3
0.20 REF
L
0.30 0.40 0.50
e
0.50 BSC
b
0.18 0.25 0.30
Integrated Silicon Solution, Inc.
Rev. B
1/04/08
tie bars⁽³⁾
A2
A3
e (6X)
A1
1.50 REF.
Pad 1 ID
L (8X)
Notes:
1. Refer to JEDEC Drawing MO-229.
2. This is the metallized terminal and
is measured between 0.18 mm
and 0.30 mm from the terminal tip.
The terminal may have a straight
end instead of rounded.
3. Package may have exposed tie
bars, ending flush with package
edge.
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