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IS61QDB21M18A Datasheet, PDF (14/30 Pages) Integrated Silicon Solution, Inc – 512Kx36 and 1Mx18 configuration available
IS61QDB21M18A
IS61QDB251236A
Recommended DC Operating Conditions
(Over the Operating Temperature Range)
Parameter
Symbol
Min
Supply Voltage
VDD
1.8–5%
Output Driver Supply Voltage
VDDQ
1.4
Input High Voltage
VIH
VREF+0.1
Input Low Voltage
VIL
–0.2
Input Reference Voltage
VREF
0.68
Clock Signal Voltage
VIN-CLK
–0.2
Typical
1.8
1.5
-
-
0.75
-
Notes:
1. All voltages are referenced to VSS. All VDD, VDDQ, and VSS pins must be connected.
2. VIH(Max) AC = See
.
3. VIL(Min) AC = See
.
4. VIN-CLK specifies the maximum allowable DC excursions of each clock (K, K#, C, and C#).
5. Peak-to-peak AC component superimposed on VREF may not exceed 5% of VREF.
Max
1.8+5%
VDD
VDDQ+0.2
VREF –0.1
0.95
VDDQ+0.2
Units
V
V
V
V
V
V
Overshoot and Undershoot Timings
20% Min Cycle Time
VDDQ + 0.6V
20% Min Cycle Time
Notes
1
1
1, 2
1, 3
1, 5
1, 4
GND
VDDQ
VIH(max) AC Overshoot Timing
GND - 0.6V
VIL(min) AC Undershoot Timing
Integrated Silicon Solution, Inc.- www.issi.com
14
Rev. B
10/02/2014