IS42S32800 Datasheet, PDF (1/62 Pages) Integrated Silicon Solution, Inc – Concurrent auto precharge

IS42S32800
2M Words x 32 Bits x 4 Banks (256-Mbit) Synchronous DRAM
P
JANUARY 2008
FEATURES
• Concurrent auto precharge
• Clock rate:166/143 MHz
• Fully synchronous operation
• Internal pipelined architecture
• Four internal banks (2M x 32bit x 4bank)
• Programmable Mode
CAS# Latency: 2 or 3
Burst Length:1,2,4,8,or full page
Burst Type: interleaved or linear burst
Burst-Read-Single-Write
• Burst stop function
• Individual byte controlled by DQM0-3
• Auto Refresh and Self Refresh
• 4096 refresh cycles/64ms (15.6µs/row)
• Single +3.3V ±0.3V power supply
• Interface:LVTTL
• Package:
86 Pin TSOP-2,0.50mm Pin Pitch
8x13mm, 90 Ball BGA, Ball pitch 0.8mm
• Pb-free package is available
• Power Down and Deep Power Down Mode
• Partial Array Self Refresh
• Temperature Compensated Self Refresh
• Output Driver Strength Selection
• Please contact Product Manager for Mobile function
detail
DESCRIPTION
The ISSI IS42S32800 is a high-speed CMOS con-
figured as a quad 2M x 32 DRAM with asynchronous
interface (all signals are registered on the positive
edge of the clock signal, CLK). Each of the 2M x 32 bit
banks is organized as 4096 rows by 512 columns by
32 bits. Read and write accesses start at a selected
locations in a programmed sequence. Accesses begin
with the registration of a BankActive command which
is then followed by a Read or Write command. The
ISSI IS42S32800 provides for programmable Read or
Write burst lengths of 1,2,4,8,or full page, with a burst
termination operation. An auto precharge function may
be enable to provide a self-timed row precharge that is
initiated at the end of the burst sequence. The refresh
functions, either Auto or Self Refresh are easy to use.
By having a programmable mode register, the system
can choose the most suitable modes to maximize its
performance. These devices are well suited for applica-
tions requiring high memory bandwidth.
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com
1
Rev. 
12/19/07