IS42R86400D Datasheet, PDF (1/66 Pages) Integrated Silicon Solution, Inc – Internal bank for hiding row access/precharge

IS42/45R86400D/16320D/32160D
IS42/45S86400D/16320D/32160D
16Mx32, 32Mx16, 64Mx8 _{SEPTEMBER 2012}
512Mb SDRAM
DEVICE OVERVIEW
FEATURES
• Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Power supply: Vdd/Vddq = 2.3V-3.6V
IS42/45SxxxxxD - Vdd/Vddq = 3.3V
IS42/45RxxxxxD - Vdd/Vddq = 2.5
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
ISSI's 512Mb Synchronous DRAM achieves high-speed
data transfer using pipeline architecture. All inputs and
outputs signals refer to the rising edge of the clock input.
The 512Mb SDRAM is organized as follows.
PACKAGE INFORMATION
IS42/45S32160D IS42/45S16320D IS42/45S86400D
IS42/45R32160D IS42/45R16320D IS42/45R86400D
4M x 32 x 4
8M x 16 x 4
16M x 8 x 4
banks
banks
banks
90-ball TF-BGA 54-pin TSOP-II 54-pin TSOP-II
54-ball TF-BGA
KEY TIMING PARAMETERS
Parameter
-5
-6
-7 Unit
• Auto Refresh (CBR)
• Self Refresh
• 8K refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge
command
• Packages:
x8/x16: 54-pin TSOP-II, 54-ball TF-BGA (x16 only)
x32: 90-ball TF-BGA
• Temperature Range:
Commercial (0^oC to +70^oC)
Industrial (-40^oC to +85^oC)
Automotive, A1 (-40^oC to +85^oC)
Automotive, A2 (-40^oC to +105^oC)
Clk Cycle Time
CAS Latency = 3
CAS Latency = 2
Clk Frequency
CAS Latency = 3
CAS Latency = 2
Access Timefrom Clock
CAS Latency = 3
CAS Latency = 2
5
6
7 ns
10
10 7.5 ns
200 167 143 Mhz
100 100 133 Mhz
5.0
5.4 5.4 ns
6
6 5.4 ns
ADDRESS TABLE
Parameter 16M x 32
Configuration 4M x 32 x 4
banks
Bank Address BA0, BA1
Pins
Autoprecharge A10/AP
Pins
32M x 16
8M x 16 x 4
banks
BA0, BA1
A10/AP
64M x 8
16M x 8 x 4
banks
BA0, BA1
A10/AP
Row Address 8K(A0 – A12) 8K(A0 – A12) 8K(A0 – A12)
Column
512(A0 – A8) 1K(A0 – A9) 2K(A0 – A9,
Address
A11)
Refresh Count
Com./Ind./A1 8K / 64ms
8K / 64ms
8K / 64ms
A2
8K / 16ms
8K / 16ms
8K / 16ms
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time with-
out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain
the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such ap-
plications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
1
Rev. A
08/29/2012