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AUIRF2805 Datasheet, PDF (9/12 Pages) International Rectifier – ADVANCED PLANAR TECHNOLOGY, LOW ON-RESISTANCE
AUIRF2805
+
‚
-

RG
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W.
Period
ƒ
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
-
Low Leakage Inductance
Current Transformer
-„ +
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
Re-Applied
+ Voltage
-
Body Diode
Inductor Curent
Forward Drop
Ripple  5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
* VGS=10V
VDD
ISD
VDS
VGS
RG
RD
D.U.T.
10V
Pulse Width µs
Duty Factor 
+-V DD
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on) tr
td(off) tf
Fig 18b. Switching Time Waveforms
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