AUIRS2184S_15 Datasheet, PDF (6/25 Pages) International Rectifier – Floating channel designed for bootstrap operation

AUIRS2184(4)S
Recommended Operating Conditions
The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used
within the recommended conditions. The V_S and V_SS offset rating are tested with all supplies biased at a 15 V
differential.
Symbol
Definition
Min
Max
Units
V_B
High-side floating supply absolute voltage
V_S + 10 V_S + 20
V_S
High-side floating supply offset voltage
(††)
600
V_HO
High-side floating output voltage
V_S
V_B
V_CC
Low-side and logic fixed supply voltage
V_LO
Low-side output voltage
10
20
V
0
V_CC
V_IN
Logic input voltage (IN & SD ) ^{(†††)}
V_SS
V_CC
DT
Programmable deadtime pin voltage
V_SS
V_CC
V_SS
Logic ground
-5
5
T_A
Ambient temperature
-40
125
°C
†† _{Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to –VBS. (Please refer to Design}
Tip DT97-3 for more details).
††† _{HIN and LIN are internally clamped with a 5.2 V zener diode.}
Dynamic Electrical Characteristics
Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C ≤ Tj
≤ 125°C with bias conditions of V_BIAS (V_CC, V_BS) = 15 V, V_SS = COM, C_L = 1000 pF.
Symbol
t_on
t_off
t_sd
MT_on
MT_off
t_r
t_f
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Delay matching, HS & LS turn-on
Delay matching , HS & LS turn-off
Turn-on rise time
Turn-off fall time
Deadtime: LO turn-off to HO turn-on (DT_LO-HO) &
HO turn-off to LO turn-on (DT_HO-LO)
Deadtime matching DT_LO-HO - DT_HO-LO
Min Typ Max Units Test Conditions
— 600 900
— 230 400
— 220 350
V_S = 0 V
V_S = 0 V or 600 V
— 3 90
ns
— 15 40
— 15 60
— 12 35
V_S = 0 V
280 375 520
3.9 5 6 µs
— 0 50
ns
— 0 600
R_DT = 0 Ω
R_DT = 200 kΩ
R_DT = 0 Ω
R_DT = 200 kΩ
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July 22, 2014