D2800D_15 Datasheet, PDF (5/10 Pages) International Rectifier – HIGH RELIABILITY, RADIATION TOLERANT, LOW POWER, DC-DC CONVERTER

D28XXD-SERIES
(28V Input, Regulated Dual Outputs)
Electrical Performance Characteristics (continued)
Parameter
Capacitive load (C_L)
D2805D
D2812D
D2815D
Group A
Subgroup
1
Conditions
-55°C ≤ T_C ≤ +85°C
V_IN = 28V DC ± 5%, C_L = 0
unless otherwise specified
I_OUT = 100% rated load
No effect on DC performance
Notes 1, 4
Each output
Turn-on response
overshoot (V_OS)
D2805D
D2812D
D2815D
Turn-on delay (T_DLY)
Enable input (Inhibit)
open circuit voltage
Drive current (sink)
Voltage range
EMC conducted
susceptibility
(Line rejection)
Electromagnetic Interference
(EMI), conducted emission
(CE)
Isolation
4,5,6
1,2,3
1
1
1
10% Load, Full Load
Note 9
Note 1
I_OUT = 100% rated load
Primary power sine wave injection of
2Vp-p, 100Hz to 50MHz, Note 1
I_OUT = 100% rated load, Note 1
Input to Output or Any Pin to Case
except Pin 3, test @ 100 VDC
Device Weight
MTBF
MIL-HDBK-217F2, SF, 35°C
Limits
Min
Nom
Max
220
33
33
25
25
25
10
10
100
0
0.4
80
90
100
100.000
Limits per Fig. 1
55
Unit
µF
mV
ms
V
µA
V
dB
MΩ
g
Hours
Notes: Specification and Electrical Performance Characteristics
1. Parameter is tested as part of design characterization or after design changes. Thereafter, parameter shall be
guaranteed to the limits specified.
2. Parameter verified during line and load regulation tests.
3. Guaranteed for a D.C. to 20 MHz bandwidth. Tested using a 20 kHz to 10 MHz bandwidth.
4. Capacitive load may be any value from 0 to the maximum limit without compromising dc performance.
A capacitive load in excess of the maximum limit may interfere with the proper operation of the converter’s overload
protection, causing erratic behavior during turn-on.
5. Overload power dissipation is defined as the device power dissipation with the load set such that V_OUT = 90% of
nominal.
6. Load step transition time > 100 µs
7. Recovery time is measured from the initiation of the transient to where V_OUT has returned to within ±1% of its steady
state value.
8. Line step transition time > 100 µs.
9. Turn-on delay time from either a step application of input power or a logic low to a logic high transition on the Inhibit
Pin (Pin 6) to the point where V_OUT = 90% of nominal.
10. Current limit point expressed as a percentage of full rated load current.
11. For models with two positive outputs the envelope specification for the design is that each output voltage is limited to
the range 1V to 5V.
12. Although operation at temperatures between +85°C and +125°C is guaranteed, no parameter limits are specified.
13. Meets the derating requirements of EEE-INST-002 and MIL-STD-1547B – except for ceramic capacitors with voltage
stress below 10V will minimum be rated at 50V.
14. End of life is + 3%
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