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IRFB4110PBF Datasheet, PDF (2/8 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS | |||
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IRFB4110PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
âV(BR)DSS/âTJ
RDS(on)
VGS(th)
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
100 âââ âââ
âââ 0.108 âââ
âââ 3.7 4.5
2.0 âââ 4.0
âââ âââ 20
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 5mAd
m⦠VGS = 10V, ID = 75A g
V VDS = VGS, ID = 250µA
µA VDS = 100V, VGS = 0V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
âââ âââ 250
VDS = 100V, VGS = 0V, TJ = 125°C
âââ âââ 100 nA VGS = 20V
âââ âââ -100
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
Qg
Total Gate Charge
Qgs
Gate-to-Source Charge
Qgd
Gate-to-Drain ("Miller") Charge
160 âââ âââ
âââ 150 210
âââ 35 âââ
âââ 43 âââ
S VDS = 50V, ID = 75A
nC ID = 75A
VDS = 50V
VGS = 10V g
RG
Gate Resistance
âââ 1.3 âââ
td(on)
Turn-On Delay Time
âââ 25 âââ
tr
Rise Time
âââ 67 âââ
td(off)
Turn-Off Delay Time
âââ 78 âââ
tf
Fall Time
âââ 88 âââ
Ciss
Input Capacitance
âââ 9620 âââ
Coss
Output Capacitance
âââ 670 âââ
Crss
Reverse Transfer Capacitance
âââ 250 âââ
Coss eff. (ER) Effective Output Capacitance (Energy Related)i âââ 820 âââ
Coss eff. (TR) Effective Output Capacitance (Time Related)h âââ 950 âââ
â¦
ns VDD = 65V
ID = 75A
RG = 2.6â¦
VGS = 10V g
pF VGS = 0V
VDS = 50V
Æ = 1.0MHz
VGS = 0V, VDS = 0V to 80V j
VGS = 0V, VDS = 0V to 80V h
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) di
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
âââ âââ 170c A MOSFET symbol
D
showing the
âââ âââ 670
integral reverse
G
p-n junction diode.
S
âââ âââ 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
âââ 50 75 ns TJ = 25°C
VR = 85V,
âââ 60 90
TJ = 125°C
âââ 94 140 nC TJ = 25°C
IF = 75A
di/dt = 100A/µs g
âââ 140 210
TJ = 125°C
âââ 3.5 âââ A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction  Coss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Package limitation current is 75A.
 Repetitive rating; pulse width limited by max. junction
temperature.
 Limited by TJmax, starting TJ = 25°C, L = 0.074mH
as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
 When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25â¦, IAS = 75A, VGS =10V. Part not recommended for use
above this value.
mended footprint and soldering techniques refer to application note #AN-994.
 Rθ is measured at TJ approximately 90°C.
 ISD ⤠75A, di/dt ⤠630A/µs, VDD ⤠V(BR)DSS, TJ ⤠175°C.
Â
Pulse width ⤠400µs; duty cycle ⤠2%.
2
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