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IRFB3077PBF Datasheet, PDF (2/8 Pages) International Rectifier – High Efficiency Synchronous Rectification in SMPS
IRFB3077PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
RG
Gate Input Resistance
Min. Typ. Max. Units
Conditions
75 ––– –––
––– 0.091 –––
––– 2.8 3.3
V VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 5mAd
mΩ VGS = 10V, ID = 75A g
2.0 ––– 4.0 V VDS = VGS, ID = 250µA
––– ––– 20 µA VDS = 75V, VGS = 0V
––– ––– 250
VDS = 75V, VGS = 0V, TJ = 125°C
––– ––– 100 nA VGS = 20V
––– ––– -100
VGS = -20V
––– 1.2 ––– Ω f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
Conditions
gfs
Forward Transconductance
160 ––– –––
Qg
Total Gate Charge
Qgs
Gate-to-Source Charge
Qgd
Gate-to-Drain ("Miller") Charge
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Ciss
Input Capacitance
––– 160 220
––– 37 –––
––– 42 –––
––– 25 –––
––– 87 –––
––– 69 –––
––– 95 –––
––– 9400 –––
Coss
Output Capacitance
––– 820 –––
Crss
Reverse Transfer Capacitance
––– 350 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related)i ––– 1090 –––
Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 1260 –––
S VDS = 50V, ID = 75A
nC ID = 75A
VDS = 38V
VGS = 10V g
ns VDD = 38V
ID = 75A
RG = 2.1Ω
VGS = 10V g
pF VGS = 0V
VDS = 50V
ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 60V j, See Fig.11
VGS = 0V, VDS = 0V to 60V h, See Fig. 5
Diode Characteristics
Symbol
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode) di
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
––– ––– 210c A MOSFET symbol
D
showing the
––– ––– 850
integral reverse
G
p-n junction diode.
S
––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
––– 42 63 ns TJ = 25°C
VR = 64V,
––– 50 75
TJ = 125°C
––– 59 89 nC TJ = 25°C
IF = 75A
di/dt = 100A/µs g
––– 86 130
TJ = 125°C
––– 2.5 ––– A TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Calculated continuous current based on maximum allowable junction † Coss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Package limitation current is 75A
as Coss while VDS is rising from 0 to 80% VDSS.
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.08mH
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 75A, VGS =10V. Part not recommended for use
mended footprint and soldering techniques refer to application note #AN-994.
above this value.
‰ Rθ is measured at TJ approximately 90°C
„ ISD ≤ 75A, di/dt ≤ 400A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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